mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
146 lines
2.8 KiB
C
146 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2019 Toradex
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <cpu_func.h>
|
|
#include <init.h>
|
|
#include <asm/global_data.h>
|
|
|
|
#include <asm/arch/clock.h>
|
|
#include <asm/arch/imx8-pins.h>
|
|
#include <asm/arch/iomux.h>
|
|
#include <asm/arch/sci/sci.h>
|
|
#include <asm/arch/sys_proto.h>
|
|
#include <asm/gpio.h>
|
|
#include <asm/io.h>
|
|
#include <env.h>
|
|
#include <errno.h>
|
|
#include <linux/libfdt.h>
|
|
|
|
#include "../common/tdx-cfg-block.h"
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
|
|
(SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
|
|
(SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
|
|
(SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
|
|
|
|
static iomux_cfg_t uart1_pads[] = {
|
|
SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
|
|
SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
|
|
};
|
|
|
|
static void setup_iomux_uart(void)
|
|
{
|
|
imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
|
|
}
|
|
|
|
void board_mem_get_layout(u64 *phys_sdram_1_start,
|
|
u64 *phys_sdram_1_size,
|
|
u64 *phys_sdram_2_start,
|
|
u64 *phys_sdram_2_size)
|
|
{
|
|
u32 is_quadplus = 0, val = 0;
|
|
sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val);
|
|
|
|
if (scierr == SC_ERR_NONE) {
|
|
/* QP has one A72 core disabled */
|
|
is_quadplus = ((val >> 4) & 0x3) != 0x0;
|
|
}
|
|
|
|
*phys_sdram_1_start = PHYS_SDRAM_1;
|
|
*phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
|
|
*phys_sdram_2_start = PHYS_SDRAM_2;
|
|
if (is_quadplus)
|
|
/* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */
|
|
*phys_sdram_2_size = 0x0UL;
|
|
else
|
|
*phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
|
|
}
|
|
|
|
int board_early_init_f(void)
|
|
{
|
|
sc_pm_clock_rate_t rate = SC_80MHZ;
|
|
sc_err_t err = 0;
|
|
|
|
/* Set UART1 clock root to 80 MHz and enable it */
|
|
err = sc_pm_setup_uart(SC_R_UART_1, rate);
|
|
if (err != SC_ERR_NONE)
|
|
return 0;
|
|
|
|
setup_iomux_uart();
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if CONFIG_IS_ENABLED(DM_GPIO)
|
|
static void board_gpio_init(void)
|
|
{
|
|
/* TODO */
|
|
}
|
|
#else
|
|
static inline void board_gpio_init(void) {}
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_FEC_MXC)
|
|
#include <miiphy.h>
|
|
|
|
int board_phy_config(struct phy_device *phydev)
|
|
{
|
|
if (phydev->drv->config)
|
|
phydev->drv->config(phydev);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
int checkboard(void)
|
|
{
|
|
puts("Model: Toradex Apalis iMX8\n");
|
|
|
|
build_info();
|
|
print_bootinfo();
|
|
|
|
return 0;
|
|
}
|
|
|
|
int board_init(void)
|
|
{
|
|
board_gpio_init();
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Board specific reset that is system reset.
|
|
*/
|
|
void reset_cpu(void)
|
|
{
|
|
/* TODO */
|
|
}
|
|
|
|
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
|
|
int ft_board_setup(void *blob, struct bd_info *bd)
|
|
{
|
|
return ft_common_board_setup(blob, bd);
|
|
}
|
|
#endif
|
|
|
|
int board_mmc_get_env_dev(int devno)
|
|
{
|
|
return devno;
|
|
}
|
|
|
|
int board_late_init(void)
|
|
{
|
|
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
/* TODO move to common */
|
|
env_set("board_name", "Apalis iMX8QM");
|
|
env_set("board_rev", "v1.0");
|
|
#endif
|
|
|
|
return 0;
|
|
}
|