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5f405e7fa0
Update EMIF data based on recommendations from the now standard TI EMIF tool version 1.1.1 based on 256MBx16 DDR3L Kingston D2516EC4BXGGB data sheet Update T_RRD from 5 to 6 based on AM57xx TRM - Minimum number of DDR cycles from activate to ativate for a different bank, minus 1. Update T_CKESR from 4 to 3 based on AM57xx TRM - Minimum number of DDR clocks cycles for which SDRAM must remain in self refresh, minus 1. Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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| .. | ||
| board.c | ||
| Kconfig | ||
| MAINTAINERS | ||
| Makefile | ||
| mux_data.h | ||