mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 01:19:49 +00:00
def50c66cc
The pcie pinctrl override added in the commita76aa6ffa6("rockchip: rk3568-rock-3a: Enable PCIe and NVMe support") is causing a pinmux issue on linux when using a EFI boot flow. The pcie reset-gpios must however be configured with gpio function, or the device will freeze running pci enum and nothing is connected. Adjust the pinctrl override in u-boot.dtsi to fix this issue. PCIe/NVMe continues to work in both U-Boot and linux after this change. Also revert disable of sdmmc2 and uart1 to fix use of wifi in linux when using a EFI boot flow. Fixes:a76aa6ffa6("rockchip: rk3568-rock-3a: Enable PCIe and NVMe support") Fixes:073d911ae6("rockchip: rk3568-rock-3a: Sync device tree from linux") Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
56 lines
874 B
Text
56 lines
874 B
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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* (C) Copyright 2023 Akash Gajjar <gajjar04akash@gmail.com>
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*/
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#include "rk356x-u-boot.dtsi"
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/ {
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chosen {
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stdout-path = &uart2;
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};
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};
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&pcie3x2 {
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pinctrl-0 = <&pcie3x2_reset_h>;
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};
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&pinctrl {
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pcie {
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pcie3x2_reset_h: pcie3x2-reset-h {
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rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdhci {
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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};
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&sfc {
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bootph-pre-ram;
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u-boot,spl-sfc-no-dma;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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flash@0 {
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bootph-pre-ram;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&uart2 {
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clock-frequency = <24000000>;
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bootph-all;
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status = "okay";
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};
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