mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-03 01:50:25 +00:00
7bdfe85929
enable DTS support for keymile mpc83xx based boards.
get rid of compile warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Therefore done:
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Series-to: u-boot
Series-version: 3
Series-changes: 3
- rebase patchset to current mainline commit
c0192950df
- update defconfig files
Series-changes: 2
- add patch which fixes Codingstyle errors in drivers/qe
- add patch which converts the mpc83xx based boards from
keymile to DM_ETH
Cover-letter:
powerpc, mpc83xx: add DM_ETH support
This patch series adds DM ethernet support for mpc83xx based
keymile boards.
Travis build:
END
130 lines
3.3 KiB
C
130 lines
3.3 KiB
C
/*
|
|
* Internal Definitions
|
|
*/
|
|
#include <linux/stringify.h>
|
|
#define BOOTFLASH_START 0xF0000000
|
|
|
|
/*
|
|
* DDR Setup
|
|
*/
|
|
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
|
|
#define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
|
|
|
|
#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
|
|
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
|
|
|
|
#define CFG_83XX_DDR_USES_CS0
|
|
|
|
/*
|
|
* Manually set up DDR parameters
|
|
*/
|
|
#define CONFIG_DDR_II
|
|
#define CONFIG_SYS_DDR_SIZE 2048 /* MB */
|
|
|
|
/*
|
|
* The reserved memory
|
|
*/
|
|
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
|
|
#define CONFIG_SYS_FLASH_BASE 0xF0000000
|
|
|
|
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
|
|
#define CONFIG_SYS_RAMBOOT
|
|
#endif
|
|
|
|
/* Reserve 768 kB for Mon */
|
|
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
|
|
|
|
/*
|
|
* Initial RAM Base Address Setup
|
|
*/
|
|
#define CONFIG_SYS_INIT_RAM_LOCK
|
|
#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
|
|
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
|
|
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
|
|
GENERATED_GBL_DATA_SIZE)
|
|
/*
|
|
* Init Local Bus Memory Controller:
|
|
*
|
|
* Bank Bus Machine PortSz Size Device
|
|
* ---- --- ------- ------ ----- ------
|
|
* 0 Local GPCM 16 bit 256MB FLASH
|
|
* 1 Local GPCM 8 bit 128MB GPIO/PIGGY
|
|
*
|
|
*/
|
|
|
|
/*
|
|
* FLASH on the Local Bus
|
|
*/
|
|
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
|
|
|
|
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
|
|
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
|
|
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
|
|
|
|
/* I2C */
|
|
#define CONFIG_SYS_I2C
|
|
#define CONFIG_SYS_NUM_I2C_BUSES 4
|
|
#define CONFIG_SYS_I2C_MAX_HOPS 1
|
|
#define CONFIG_SYS_I2C_FSL
|
|
#define CONFIG_SYS_FSL_I2C_SPEED 200000
|
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
|
|
#define CONFIG_SYS_I2C_OFFSET 0x3000
|
|
#define CONFIG_SYS_FSL_I2C2_SPEED 200000
|
|
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
|
#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
|
|
#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
|
|
{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
|
|
{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
|
|
{1, {I2C_NULL_HOP} } }
|
|
|
|
#if defined(CONFIG_CMD_NAND)
|
|
#define CONFIG_NAND_KMETER1
|
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
|
|
#endif
|
|
|
|
/*
|
|
* For booting Linux, the board info and command line data
|
|
* have to be in the first 8 MB of memory, since this is
|
|
* the maximum mapped by the Linux kernel during initialization.
|
|
*/
|
|
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
|
|
|
|
/*
|
|
* Environment
|
|
*/
|
|
|
|
#ifndef CONFIG_SYS_RAMBOOT
|
|
/* Address and size of Redundant Environment Sector */
|
|
#endif /* CFG_SYS_RAMBOOT */
|
|
|
|
/*
|
|
* Environment Configuration
|
|
*/
|
|
#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
|
|
#define CONFIG_KM_DEF_ENV "km-common=empty\0"
|
|
#endif
|
|
|
|
#ifndef CONFIG_KM_DEF_ARCH
|
|
#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
|
|
#endif
|
|
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
CONFIG_KM_DEF_ENV \
|
|
CONFIG_KM_DEF_ARCH \
|
|
"newenv=" \
|
|
"prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \
|
|
"era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \
|
|
"unlock=yes\0" \
|
|
""
|
|
|
|
#if defined(CONFIG_UEC_ETH)
|
|
#define CONFIG_HAS_ETH0
|
|
#endif
|
|
|
|
/*
|
|
* QE UEC ethernet configuration
|
|
*/
|
|
#define CONFIG_UEC_ETH
|
|
#define CONFIG_ETHPRIME "UEC0"
|