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CTRLR0 can have several different layouts depending on the specific device (dw-apb-ssi vs dwc-ssi), and specific parameters set during synthesis. Update the driver to support three specific configurations: dw-apb-ssi with SSI_MAX_XFER_SIZE=16, dw-apb-ssi with SSI_MAX_XFER_SIZE=32, and dwc-ssi. dw-apb-ssi is the version of the device on Altera/Intel SoCFPGAs, MSCC SoCs, and Canaan Kendryte K210 SoCs. This is the only version this driver supported before this change. The register layout before version 3.23a is: | 31 .. 16 | | other stuff | | 15 .. 10 | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 | | other stuff | TMOD | MODE | FRF | DFS | Note that DFS (Data Frame Size) is only 4 bits, limiting transfers to data frames of 16 bits or less. In version 3.23a, the SSI_MAX_XFER_SIZE parameter was introduced. This parameter defaults to 16 (resulting in the same layout as prior versions), but may also be set to 32. To allow setting longer data frame sizes, a new DFS_32 register was introduced: | 31 .. 21 | 20 .. 16 | | other stuff | DFS_32 | | 15 .. 10 | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 | | other stuff | TMOD | MODE | FRF | all zeros | The old DFS field no longer controls the data frame size. To detect this layout, we try writing 0xF to DFS. If we read back 0x0, then this device has SSI_MAX_XFER_SIZE=32. dwc-ssi is the version of the device on Intel Keem Bay SoCs and Canaan Kendryte K210 SoCs. The layout of ctrlr0 is: | 31 .. 16 | | other stuff | | 15 .. 12 | 11 .. 10 | 9 .. 8 | 7 .. 6 | 4 .. 0 | | other stuff | TMOD | MODE | FRF | DFS_32 | The semantics of the fields have not changed since the previous version. However, SSI_MAX_XFER_SIZE is effectively always 32. To support these different layouts, we model our approach on the one which the Linux kernel has taken. During probe, the driver calls an init function stored in driver_data. This init function is responsible for determining the layout of CTRLR0, and supplying the update_cr0 function. The style of and information behind this commit is based on the Linux MMIO driver for these devices. Specific reference was made to the series adding support for Intel Keem Bay SoCs [1]. [1] https://lore.kernel.org/linux-spi/20200505130618.554-1-wan.ahmad.zainie.wan.mohamad@intel.com/ Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
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| .. | ||
| altera_spi.c | ||
| atcspi200_spi.c | ||
| ath79_spi.c | ||
| atmel-quadspi.c | ||
| atmel_spi.c | ||
| atmel_spi.h | ||
| bcm63xx_hsspi.c | ||
| bcm63xx_spi.c | ||
| bcmstb_spi.c | ||
| cadence_qspi.c | ||
| cadence_qspi.h | ||
| cadence_qspi_apb.c | ||
| cf_spi.c | ||
| davinci_spi.c | ||
| designware_spi.c | ||
| exynos_spi.c | ||
| fsl_dspi.c | ||
| fsl_espi.c | ||
| fsl_qspi.c | ||
| ich.c | ||
| ich.h | ||
| Kconfig | ||
| kirkwood_spi.c | ||
| Makefile | ||
| meson_spifc.c | ||
| mpc8xx_spi.c | ||
| mpc8xxx_spi.c | ||
| mscc_bb_spi.c | ||
| mt7621_spi.c | ||
| mtk_snfi_spi.c | ||
| mvebu_a3700_spi.c | ||
| mxc_spi.c | ||
| mxs_spi.c | ||
| nxp_fspi.c | ||
| octeon_spi.c | ||
| omap3_spi.c | ||
| pic32_spi.c | ||
| pl022_spi.c | ||
| renesas_rpc_spi.c | ||
| rk_spi.c | ||
| rk_spi.h | ||
| sandbox_spi.c | ||
| sh_qspi.c | ||
| soft_spi.c | ||
| spi-emul-uclass.c | ||
| spi-mem-nodm.c | ||
| spi-mem.c | ||
| spi-qup.c | ||
| spi-sifive.c | ||
| spi-sunxi.c | ||
| spi-uclass.c | ||
| spi.c | ||
| stm32_qspi.c | ||
| stm32_spi.c | ||
| tegra20_sflash.c | ||
| tegra20_slink.c | ||
| tegra114_spi.c | ||
| tegra210_qspi.c | ||
| tegra_spi.h | ||
| ti_qspi.c | ||
| uniphier_spi.c | ||
| xilinx_spi.c | ||
| zynq_qspi.c | ||
| zynq_spi.c | ||
| zynqmp_gqspi.c | ||