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u-boot/arch/arm/mach-tegra/tegra114
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Thierry Reding 8e1601d994 ARM: tegra114: Clear IDDQ when enabling PLLC 
Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence"). The Tegra114 TRM doesn't contain this information, but
the programming of PLLC is the same on Tegra114 and Tegra124.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:11:31 -07:00
..
clock.c ARM: tegra114: Clear IDDQ when enabling PLLC 2015-09-16 16:11:31 -07:00
cpu.c Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. 2015-08-05 15:22:51 -07:00
funcmux.c ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
Kconfig arch: Make board selection choices optional 2015-05-12 18:10:02 -04:00
Makefile ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
pinmux.c ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00