mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 09:27:35 +00:00
a2ac2b964b
This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com>
100 lines
2.5 KiB
Text
100 lines
2.5 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_SYS_TEXT_BASE=0x00200000
|
|
CONFIG_SPL_GPIO=y
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
CONFIG_ENV_OFFSET=0x3F8000
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
|
|
CONFIG_ROCKCHIP_RK3328=y
|
|
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
|
|
CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_SPL_DRIVERS_MISC=y
|
|
CONFIG_SPL_STACK_R_ADDR=0x600000
|
|
CONFIG_DEBUG_UART_BASE=0xFF130000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
|
|
CONFIG_SYS_LOAD_ADDR=0x800800
|
|
# CONFIG_ANDROID_BOOT_IMAGE is not set
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_MISC_INIT_R=y
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_I2C=y
|
|
CONFIG_SPL_POWER=y
|
|
CONFIG_SPL_ATF=y
|
|
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
|
CONFIG_CMD_BOOTZ=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_TPL_OF_CONTROL=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_TPL_OF_PLATDATA=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_NET_RANDOM_ETHADDR=y
|
|
CONFIG_TPL_DM=y
|
|
CONFIG_REGMAP=y
|
|
CONFIG_SPL_REGMAP=y
|
|
CONFIG_TPL_REGMAP=y
|
|
CONFIG_SYSCON=y
|
|
CONFIG_SPL_SYSCON=y
|
|
CONFIG_TPL_SYSCON=y
|
|
CONFIG_CLK=y
|
|
CONFIG_SPL_CLK=y
|
|
CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
|
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_SF_DEFAULT_SPEED=20000000
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
CONFIG_GMAC_ROCKCHIP=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_DM_PMIC=y
|
|
CONFIG_PMIC_RK8XX=y
|
|
CONFIG_SPL_DM_REGULATOR=y
|
|
CONFIG_REGULATOR_PWM=y
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
CONFIG_SPL_DM_REGULATOR_FIXED=y
|
|
CONFIG_REGULATOR_RK8XX=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_RAM=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_TPL_RAM=y
|
|
CONFIG_DM_RESET=y
|
|
CONFIG_BAUDRATE=1500000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYSINFO=y
|
|
CONFIG_SYSRESET=y
|
|
# CONFIG_TPL_SYSRESET is not set
|
|
CONFIG_USB=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_XHCI_DWC3=y
|
|
CONFIG_USB_EHCI_HCD=y
|
|
CONFIG_USB_EHCI_GENERIC=y
|
|
CONFIG_USB_OHCI_HCD=y
|
|
CONFIG_USB_OHCI_GENERIC=y
|
|
CONFIG_USB_DWC2=y
|
|
CONFIG_USB_DWC3=y
|
|
# CONFIG_USB_DWC3_GADGET is not set
|
|
CONFIG_USB_GADGET=y
|
|
CONFIG_USB_GADGET_DWC2_OTG=y
|
|
CONFIG_SPL_TINY_MEMSET=y
|
|
CONFIG_TPL_TINY_MEMSET=y
|
|
CONFIG_ERRNO_STR=y
|