Ye Li 7a6577fed4 ddr: Add DDR driver for iMX8ULP ... Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by: Ye Li <ye.li@nxp.com>		2021-08-09 14:46:51 +02:00
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altera	arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64	2021-03-08 10:59:10 +08:00
fsl	ppc: Remove T4160RDB board	2021-07-07 19:52:24 -04:00
imx	ddr: Add DDR driver for iMX8ULP	2021-08-09 14:46:51 +02:00
marvell	ARM: mvebu: a38x: Correct mismatched bound warnings	2021-07-07 10:17:54 -04:00
microchip	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
Kconfig	drivers: ddr: introduce DDR driver for i.MX8M	2019-01-01 14:12:18 +01:00