mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
9774462e34
With the exceptions of ds109, ds414, icnova-a20-swac, nokia_rx51 and stemmy, disable ATAG support. A large number of platforms had enabled support but never supported a kernel so old as to require it. Further, some platforms are old enough to support both, but are well supported by devicetree booting, and have been for a number of years. This is because some of the ATAGs related functions have been re-used to provide the same kind of information, but for devicetree or just generally to inform the user. When needed still, rename these functions to get_board_revision() instead, to avoid conflicts. In other cases, these functions were simply unused, so drop them. Cc: Andre Przywara <andre.przywara@arm.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Phil Sutter <phil@nwl.cc> Cc: Stefan Bosch <stefan_b@posteo.net> Signed-off-by: Tom Rini <trini@konsulko.com>
115 lines
2.1 KiB
C
115 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) Guangzhou FriendlyARM Computer Tech. Co., Ltd.
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* (http://www.friendlyarm.com)
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*/
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#include <config.h>
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#include <common.h>
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#include <i2c.h>
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#include <asm/io.h>
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#include <asm/arch/nexell.h>
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#include <asm/arch/nx_gpio.h>
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/* Board revision list: <PCB3 | PCB2 | PCB1>
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* 0b000 - NanoPi 2
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* 0b001 - NanoPC-T2
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* 0b010 - NanoPi S2
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* 0b011 - Smart4418
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* 0b100 - NanoPi Fire 2A
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* 0b111 - NanoPi M2A
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*
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* Extented revision:
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* 0b001 - Smart4418-SDK
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*/
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#define __IO_GRP 2 /* GPIO_C */
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#define __IO_PCB1 26
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#define __IO_PCB2 27
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#define __IO_PCB3 25
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static int pcb_rev = -1;
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static int base_rev;
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static void bd_hwrev_config_gpio(void)
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{
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int gpios[3][2] = {
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{ __IO_PCB1, 1 },
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{ __IO_PCB2, 1 },
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{ __IO_PCB3, 1 },
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};
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int i;
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/* gpio input mode, pull-down */
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for (i = 0; i < 3; i++) {
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nx_gpio_set_pad_function(__IO_GRP, gpios[i][0], gpios[i][1]);
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nx_gpio_set_output_enable(__IO_GRP, gpios[i][0], 0);
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nx_gpio_set_pull_mode(__IO_GRP, gpios[i][0], 0);
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}
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}
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void bd_hwrev_init(void)
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{
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if (pcb_rev >= 0)
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return;
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bd_hwrev_config_gpio();
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pcb_rev = nx_gpio_get_input_value(__IO_GRP, __IO_PCB1);
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pcb_rev |= nx_gpio_get_input_value(__IO_GRP, __IO_PCB2) << 1;
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pcb_rev |= nx_gpio_get_input_value(__IO_GRP, __IO_PCB3) << 2;
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}
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/* Get extended revision for SmartXX18 */
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void bd_base_rev_init(void)
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{
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struct udevice *dev;
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u8 val = 0;
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if (pcb_rev != 0x3)
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return;
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#define PCA9536_I2C_BUS 2
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#define PCA9636_I2C_ADDR 0x41
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if (i2c_get_chip_for_busnum
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(PCA9536_I2C_BUS, PCA9636_I2C_ADDR, 1, &dev))
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return;
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if (!dm_i2c_read(dev, 0, &val, 1))
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base_rev = (val & 0xf);
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}
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/* To override __weak symbols */
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u32 get_board_revision(void)
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{
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return (base_rev << 8) | pcb_rev;
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}
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#ifdef CONFIG_REVISION_TAG
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u32 get_board_rev(void)
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{
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return get_board_revision();
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}
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#endif
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const char *get_board_name(void)
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{
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bd_hwrev_init();
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switch (pcb_rev) {
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case 0:
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return "NanoPi 2";
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case 1:
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return "NanoPC-T2";
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case 2:
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return "NanoPi S2";
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case 3:
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return "Smart4418";
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case 4:
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return "NanoPi Fire 2A";
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case 7:
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return "NanoPi M2A";
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default:
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return "s5p4418-X";
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}
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}
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