Shengyu Qu 47ed15125c riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE ... Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE. Signed-off-by: Bo Gan <ganboing@gmail.com> Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>		2023-08-10 10:58:55 +08:00
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cpu	riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE	2023-08-10 10:58:55 +08:00
dts	riscv: dts: starfive: Enable pcie0 dts node	2023-08-10 10:58:01 +08:00
include/asm	cmd/sbi: display new extensions	2023-08-10 10:57:56 +08:00
lib	riscv: Rename SiFive CLINT to RISC-V ALINT	2023-07-12 13:21:40 +08:00
config.mk	riscv: Support CONFIG_REMAKE_ELF	2023-04-20 20:45:08 +08:00
Kconfig	riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE	2023-08-10 10:58:12 +08:00
Makefile	riscv: support building double-float modules	2022-10-20 15:22:21 +08:00