u-boot/board/stx/stxxtc
Albert ARIBAUD ef123c5253 Refactor linker-generated arrays
Refactor linker-generated array code so that symbols
which were previously linker-generated are now compiler-
generated. This causes relocation records of type
R_ARM_ABS32 to become R_ARM_RELATIVE, which makes
code which uses LGA able to run before relocation as
well as after.

Note: this affects more than ARM targets, as linker-
lists span possibly all target architectures, notably
PowerPC.

Conflicts:
	arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
	arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
	arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
	board/ait/cam_enc_4xx/u-boot-spl.lds
	board/davinci/da8xxevm/u-boot-spl-da850evm.lds
	board/davinci/da8xxevm/u-boot-spl-hawk.lds
	board/vpac270/u-boot-spl.lds

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-03-12 23:28:40 +01:00
..
Makefile Switch from archive libraries to partial linking 2010-11-17 21:02:18 +01:00
README.stxxtc doc: cleanup - move board READMEs into respective board directories 2012-07-29 15:42:02 +02:00
stxxtc.c miiphy: convert to linux/mii.h 2011-01-09 18:06:50 +01:00
u-boot.lds Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00
u-boot.lds.debug Refactor linker-generated arrays 2013-03-12 23:28:40 +01:00


First, some build notes on the Silicon Turnkey eXpress XTc.

This board has both 87x/88x procesor options at various
frequencies.  The configuration file has some macros for setting
the clock speed, not all have been tested.  They all have
a 10MHz input clock.  Please do not check in a configuration
file that selects a high speed not available on all processors.
We chose the 66MHz core and bus speed, which should be OK on
all boards.  If you have a processor, lucky you! :-)
Just build a new configuration with that speed, check
the macro configuration to ensure it's correct.  If the
macro is updated, please check that in, but keep default
processor speed.

The board is likely to have more than 1Mbyte of NOR boot flash.
It was also configured with a high boot vector (Dan's fault)
so the standard 8xx mapping doesn't work well. We had to move
the addresses around a little bit so one copy would work.  The
flash got fragmented, and we are working on a better solution.
There is an "xtc.cfg" floating around for the BDI2000, use
that for programming a new version of U-Boot.  You can probably
find it on the Silicon Turnkey eXpress (www.silicontkx.com),
Embedded Alley Solutions (embeddedalley.com), or Denx (denx.de)
servers.

The board will also have various SDRAM sizes, but the code
should automatically determine the amount of memory.

There are a couple of different board versions, visually
they use different BGA or surface mount memory parts.  However,
they are logically the same board.

Now, some operational notes.

The board has the option of sporting two FEC Ethernet ports.
The second port isn't configured to be automatically available
because it would cause U-Boot to generate a board data structure
(the bd_t) with multiple MAC addresses and be incompatible with
standard 8xx kernel builds.  You can use/test the second FEC
in U-Boot by assigning an 'eth1addr' and selecting the second
FEC as the port to use.

Since this is just a development board and not a product, STx
does not assign unique MAC addresses.  We just pilfer the
"default" ones used by Wolfgang on some other boards.  Please
ensure you assign unique MAC addresses when using these boards.

The serial port baud rate is 38400, because that's the way
I like it :-)

Thanks to Pantelis for lots of the work on this board port.

Have Fun!

	-- Dan

15 August 2005