u-boot/include/configs/db-mv784mp-gp.h
Tom Rini 3b2979eefa mvebu: Use CONFIG_SPL_STACK + 4 directly for bootparam location
The definition of CONFIG_SPL_BOOTROM_SAVE is always a fixed
CONFIG_SPL_STACK + 4, while CONFIG_SPL_STACK is not constant.  This
change will make it clear where the location is still, once
CONFIG_SPL_STACK moves to Kconfig.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00

64 lines
1.5 KiB
C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014-2015 Stefan Roese <sr@denx.de>
*/
#ifndef _CONFIG_DB_MV7846MP_GP_H
#define _CONFIG_DB_MV7846MP_GP_H
/*
* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/* USB/EHCI configuration */
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
/* Environment in SPI NOR flash */
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* SATA support */
#define CONFIG_LBA48
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI_SCAN_SHOW
#endif
/* NAND */
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
#include "mv-common.h"
/*
* Memory layout while starting into the bin_hdr via the
* BootROM:
*
* 0x4000.4000 - 0x4003.4000 headers space (192KiB)
* 0x4000.4030 bin_hdr start address
* 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
* 0x4007.fffc BootROM stack top
*
* The address space between 0x4007.fffc and 0x400f.fff is not locked in
* L2 cache thus cannot be used.
*/
/* SPL */
/* Defines for SPL */
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_SPD_EEPROM 0x4e
#endif /* _CONFIG_DB_MV7846MP_GP_H */