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mvebu: Use CONFIG_SPL_STACK + 4 directly for bootparam location
The definition of CONFIG_SPL_BOOTROM_SAVE is always a fixed CONFIG_SPL_STACK + 4, while CONFIG_SPL_STACK is not constant. This change will make it clear where the location is still, once CONFIG_SPL_STACK moves to Kconfig. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
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parent
3135ba642f
commit
3b2979eefa
14 changed files with 5 additions and 17 deletions
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@ -8,19 +8,19 @@
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* contains U-Boot SPL, optionally it can also contain additional arguments.
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* The number of these arguments is in r0, pointer to the argument array in r1.
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* BootROM expects executable BIN header code to return to address stored in lr.
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* Other registers (r2 - r12) must be preserved. We save all registers to
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* CONFIG_SPL_BOOTROM_SAVE address. BIN header arguments (passed via r0 and r1)
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* Other registers (r2 - r12) must be preserved. We save all registers to the
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* address of CONFIG_SPL_STACK + 4. BIN header arguments (passed via r0 and r1)
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* are currently not used by U-Boot SPL binary.
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*/
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ENTRY(save_boot_params)
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stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */
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ldr r12, =CONFIG_SPL_BOOTROM_SAVE
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ldr r12, =(CONFIG_SPL_STACK + 4)
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str sp, [r12]
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b save_boot_params_ret
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ENDPROC(save_boot_params)
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ENTRY(return_to_bootrom)
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ldr r12, =CONFIG_SPL_BOOTROM_SAVE
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ldr r12, =(CONFIG_SPL_STACK + 4)
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ldr sp, [r12]
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ldmfd sp!, {r0 - r12, lr} /* @ restore registers from stack */
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mov r0, #0x0 /* @ return value: 0x0 NO_ERR */
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@ -283,7 +283,7 @@ u32 spl_boot_device(void)
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int board_return_to_bootrom(struct spl_image_info *spl_image,
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struct spl_boot_device *bootdev)
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{
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u32 *regs = *(u32 **)CONFIG_SPL_BOOTROM_SAVE;
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u32 *regs = *(u32 **)(CONFIG_SPL_STACK + 4);
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printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]);
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return_to_bootrom();
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@ -48,7 +48,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
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/* SPL related MMC defines */
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@ -40,7 +40,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
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/* SPL related MMC defines */
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@ -38,6 +38,5 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#endif /* _CONFIG_DB_88F6720_H */
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@ -45,7 +45,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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/*
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* mv-common.h should be defined after CMD configs since it used them
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@ -45,7 +45,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
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/* SPL related MMC defines */
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@ -57,7 +57,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
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#define CONFIG_SPD_EEPROM 0x4e
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@ -49,7 +49,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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/* Default Environment */
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@ -48,7 +48,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
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/* SPL related MMC defines */
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@ -52,7 +52,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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/* SPL related SPI defines */
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@ -77,7 +77,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
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#define CONFIG_SYS_SDRAM_SIZE SZ_2G
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@ -32,7 +32,6 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
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/* SPL related MMC defines */
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@ -72,6 +72,5 @@
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#endif /* _CONFIG_X530_H */
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