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Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200 MHz. This information is undocumented in public Marvell Kirkwood Functional Specifications [2], but is available in Linux v3.15 kirkwood code [1]. Commit8ac303d49f("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK") broke support for Marvell 88F6281 SoCs because it was expected that all those SoCs have TCLK running at 200 MHz as specified in Marvell 88F6281 Hardware Specifications [3]. Fix broken support for 88F6281 by detecting CONFIG_SYS_TCLK from SAR register, like it was doing Linux v3.15. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542 [2] - https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf [3] - https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf Update by Stefan 2022-08-23: - Fix compilation error for ds109 Fixes:8ac303d49f("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
21 lines
588 B
C
21 lines
588 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* Header file for Feroceon CPU core 88FR131 Based KW88F6281 SOC.
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*/
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#ifndef _ASM_ARCH_KW88F6281_H
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#define _ASM_ARCH_KW88F6281_H
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/* SOC specific definitions */
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#define KW88F6281_REGS_PHYS_BASE 0xf1000000
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#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
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/* TCLK Core Clock definition */
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#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(21)) ? \
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166666667 : 200000000)
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#endif /* _ASM_ARCH_KW88F6281_H */
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