mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
5824bc6d6f
Currently there are two places to specify the x86 TSC timer frequency with one in Kconfig used for early timer and the other one in device tree used when the frequency cannot be determined from hardware. This may potentially create an inconsistent config where the 2 values do not match. Let's use the one specified in Kconfig in the device tree as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
137 lines
2.8 KiB
Text
137 lines
2.8 KiB
Text
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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config INTEL_QUARK
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bool
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select HAVE_RMU
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select ARCH_EARLY_INIT_R
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select ARCH_MISC_INIT
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imply ENABLE_MRC_CACHE
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imply ETH_DESIGNWARE
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imply ICH_SPI
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imply INTEL_ICH6_GPIO
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imply MMC
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imply MMC_PCI
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imply MMC_SDHCI
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imply MMC_SDHCI_SDMA
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imply SPI_FLASH
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imply SYS_NS16550
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imply USB
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imply USB_EHCI_HCD
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if INTEL_QUARK
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config HAVE_RMU
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bool "Add a Remote Management Unit (RMU) binary"
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help
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Select this option to add a Remote Management Unit (RMU) binary
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to the resulting U-Boot image. It is a data block (up to 64K) of
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machine-specific code which must be put in the flash for the RMU
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within the Quark SoC processor to access when powered up before
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system BIOS is executed.
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config RMU_FILE
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string "Remote Management Unit (RMU) binary filename"
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depends on HAVE_RMU
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default "rmu.bin"
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help
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The filename of the file to use as Remote Management Unit (RMU)
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binary in the board directory.
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config RMU_ADDR
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hex "Remote Management Unit (RMU) binary location"
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depends on HAVE_RMU
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default 0xfff00000
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help
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The location of the RMU binary is determined by a strap. It must be
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put in flash at a location matching the strap-determined base address.
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The default base address of 0xfff00000 indicates that the binary must
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be located at offset 0 from the beginning of a 1MB flash device.
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config HAVE_CMC
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bool
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default HAVE_RMU
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config CMC_FILE
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string
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depends on HAVE_CMC
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default RMU_FILE
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config CMC_ADDR
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hex
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depends on HAVE_CMC
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default RMU_ADDR
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config ESRAM_BASE
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hex
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default 0x80000000
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help
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Embedded SRAM (eSRAM) memory-mapped base address.
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config PCIE_ECAM_BASE
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hex
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default 0xe0000000
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config RCBA_BASE
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hex
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default 0xfed1c000
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help
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Root Complex register block memory-mapped base address.
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config ACPI_PM1_BASE
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hex
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default 0x1000
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help
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ACPI Power Management 1 (PM1) i/o-mapped base address.
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This device is defined in ACPI specification, with 16 bytes in size.
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config ACPI_PBLK_BASE
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hex
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default 0x1010
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help
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ACPI Processor Block (PBLK) i/o-mapped base address.
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This device is defined in ACPI specification, with 16 bytes in size.
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config SPI_DMA_BASE
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hex
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default 0x1020
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help
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SPI DMA i/o-mapped base address.
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config GPIO_BASE
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hex
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default 0x1080
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help
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GPIO i/o-mapped base address.
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config ACPI_GPE0_BASE
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hex
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default 0x1100
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help
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ACPI General Purpose Event 0 (GPE0) i/o-mapped base address.
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This device is defined in ACPI specification, with 64 bytes in size.
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config WDT_BASE
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hex
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default 0x1140
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help
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Watchdog timer i/o-mapped base address.
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config SYS_CAR_ADDR
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hex
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default ESRAM_BASE
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config SYS_CAR_SIZE
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hex
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default 0x8000
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help
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Space in bytes in eSRAM used as Cache-As-ARM (CAR).
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Note this size must not exceed eSRAM's total size.
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config X86_TSC_TIMER_FREQ
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int
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default 400000000
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endif
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