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x86: tsc: Rename X86_TSC_TIMER_EARLY_FREQ to X86_TSC_TIMER_FREQ

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Currently there are two places to specify the x86 TSC timer frequency
with one in Kconfig used for early timer and the other one in device
tree used when the frequency cannot be determined from hardware.

This may potentially create an inconsistent config where the 2 values
do not match. Let's use the one specified in Kconfig in the device
tree as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2021-07-28 12:00:22 +08:00
parent ffaa7abfc5
commit 5824bc6d6f
4 changed files with 10 additions and 9 deletions
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4
arch/x86/cpu/quark/Kconfig
View file

@ -130,8 +130,8 @@ config SYS_CAR_SIZE
Space in bytes in eSRAM used as Cache-As-ARM (CAR).
Note this size must not exceed eSRAM's total size.
config X86_TSC_TIMER_EARLY_FREQ
config X86_TSC_TIMER_FREQ
int
default 400
default 400000000
endif

2
arch/x86/dts/galileo.dts
View file

@ -42,7 +42,7 @@
};
tsc-timer {
clock-frequency = <400000000>;
clock-frequency = <CONFIG_X86_TSC_TIMER_FREQ>;
};
mrc {

8
drivers/timer/Kconfig
View file

@ -124,12 +124,12 @@ config RENESAS_OSTM_TIMER
Enables support for the Renesas OSTM Timer driver.
This timer is present on Renesas RZ/A1 R7S72100 SoCs.
config X86_TSC_TIMER_EARLY_FREQ
int "x86 TSC timer frequency in MHz when used as the early timer"
config X86_TSC_TIMER_FREQ
int "x86 TSC timer frequency in Hz"
depends on X86_TSC_TIMER
default 1000
default 1000000000
help
Sets the estimated CPU frequency in MHz when TSC is used as the
Sets the estimated CPU frequency in Hz when TSC is used as the
early timer and the frequency can neither be calibrated via some
hardware ways, nor got from device tree at the time when device
tree is not available yet.

5
drivers/timer/tsc_timer.c
View file

@ -425,12 +425,13 @@ static void tsc_timer_ensure_setup(bool early)
goto done;
if (early)
fast_calibrate = CONFIG_X86_TSC_TIMER_EARLY_FREQ;
gd->arch.clock_rate = CONFIG_X86_TSC_TIMER_FREQ;
else
return;
done:
gd->arch.clock_rate = fast_calibrate * 1000000;
if (!gd->arch.clock_rate)
gd->arch.clock_rate = fast_calibrate * 1000000;
}
gd->arch.tsc_inited = true;
}