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u-boot/drivers/fpga
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Siva Durga Prasad Paladugu 71723aaec5 fpga: zynq: Add delay after PCFG_PROG_B change 
There is delay needed after PCFG_PROGB change if
AES key source is efuse. This fixes the issue of
encrypted bitstream loading with AES efuse as key
source.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
..
ACEX1K.c Move console definitions into a new console.h file 2015-11-19 20:27:50 -07:00
altera.c fpga: altera: Add StratixV support 2016-03-24 09:47:43 +01:00
cyclon2.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
fpga.c fpga: Simplify error path in fpga_add 2018-03-23 09:34:42 +01:00
ivm_core.c FPGA: drivers/fpga/ivm_core.c: incorrect printf 2017-04-18 10:29:23 -04:00
Kconfig arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL 2018-02-28 13:00:25 -05:00
lattice.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
Makefile arm: socfpga: Add FPGA driver support for Arria 10 2017-07-26 10:31:44 +02:00
socfpga.c arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes 2017-11-26 02:34:10 +01:00
socfpga_arria10.c wait_bit: use wait_for_bit_le32 and remove wait_for_bit 2018-01-24 12:03:43 +05:30
socfpga_gen5.c arm: socfpga: Restructure FPGA driver in the preparation to support A10 2017-07-26 10:31:44 +02:00
spartan2.c fpga: Define bitstream type based on command selection 2014-05-20 15:23:46 +02:00
spartan3.c fpga: Define bitstream type based on command selection 2014-05-20 15:23:46 +02:00
stratixII.c Fix spelling of "transferred". 2016-03-22 12:16:16 -04:00
stratixv.c treewide: replace #include <asm/errno.h> with <linux/errno.h> 2016-09-23 17:55:42 -04:00
virtex2.c Move console definitions into a new console.h file 2015-11-19 20:27:50 -07:00
xilinx.c fpga: allow programming fpga from FIT image for all FPGA drivers 2017-12-14 16:09:39 +01:00
zynqmppl.c fpga: zynqmp: Fix the nonsecure bitstream loading issue 2018-04-09 12:14:50 +02:00
zynqpl.c fpga: zynq: Add delay after PCFG_PROG_B change 2018-04-09 12:14:50 +02:00