fpga: allow programming fpga from FIT image for all FPGA drivers

This drops the limit that fpga is only loaded from FIT images for Xilinx.
This is done by moving the 'partial' check from 'common/image.c' to
'drivers/fpga/xilinx.c' (the only driver supporting partial images yet)
and supplies a weak default implementation in 'drivers/fpga/fpga.c'.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (On zcu102)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Goldschmidt Simon 2017-11-10 14:17:41 +00:00 committed by Michal Simek
parent 659208da47
commit 8b93a92f6d
5 changed files with 26 additions and 5 deletions

View file

@ -248,7 +248,7 @@ int bootm_find_images(int flag, int argc, char * const argv[])
#endif
#if IMAGE_ENABLE_FIT
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
#if defined(CONFIG_FPGA)
/* find bitstreams */
ret = boot_get_fpga(argc, argv, &images, IH_ARCH_DEFAULT,
NULL, NULL);

View file

@ -1215,7 +1215,7 @@ int boot_get_setup(bootm_headers_t *images, uint8_t arch,
}
#if IMAGE_ENABLE_FIT
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
#if defined(CONFIG_FPGA)
int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, const ulong *ld_start, ulong * const ld_len)
{
@ -1226,8 +1226,6 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
const char *uname, *name;
int err;
int devnum = 0; /* TODO support multi fpga platforms */
const fpga_desc * const desc = fpga_get_desc(devnum);
xilinx_desc *desc_xilinx = desc->devdesc;
/* Check to see if the images struct has a FIT configuration */
if (!genimg_has_config(images)) {
@ -1272,7 +1270,7 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
return fit_img_result;
}
if (img_len >= desc_xilinx->size) {
if (!fpga_is_partial_data(devnum, img_len)) {
name = "full";
err = fpga_loadbitstream(devnum, (char *)img_data,
img_len, BIT_FULL);

View file

@ -170,6 +170,15 @@ int fpga_add(fpga_type devtype, void *desc)
return devnum;
}
/*
* Return 1 if the fpga data is partial.
* This is only required for fpga drivers that support bitstream_type.
*/
int __weak fpga_is_partial_data(int devnum, size_t img_len)
{
return 0;
}
/*
* Convert bitstream data and load into the fpga
*/

View file

@ -24,6 +24,19 @@ static int xilinx_validate(xilinx_desc *desc, char *fn);
/* ------------------------------------------------------------------------- */
int fpga_is_partial_data(int devnum, size_t img_len)
{
const fpga_desc * const desc = fpga_get_desc(devnum);
xilinx_desc *desc_xilinx = desc->devdesc;
/* Check datasize against FPGA size */
if (img_len >= desc_xilinx->size)
return 0;
/* datasize is smaller, must be partial data */
return 1;
}
int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
bitstream_type bstype)
{

View file

@ -54,6 +54,7 @@ void fpga_init(void);
int fpga_add(fpga_type devtype, void *desc);
int fpga_count(void);
const fpga_desc *const fpga_get_desc(int devnum);
int fpga_is_partial_data(int devnum, size_t img_len);
int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype);
int fpga_fsload(int devnum, const void *buf, size_t size,