mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 03:03:05 +00:00
2635e3b50f
Add a mask parameter to control the lookup of the PCI region from which the mapping can be made. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
171 lines
4 KiB
C
171 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Marvell International Ltd.
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*/
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#include <dm.h>
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#include <errno.h>
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#include <malloc.h>
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#include <misc.h>
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#include <net.h>
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#include <pci_ids.h>
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#include <linux/list.h>
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#include <asm/io.h>
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#include <asm/arch/board.h>
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#include <asm/arch/csrs/csrs-npa.h>
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#include "nix.h"
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struct udevice *rvu_af_dev;
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inline struct rvu_af *get_af(void)
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{
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return rvu_af_dev ? dev_get_priv(rvu_af_dev) : NULL;
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}
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void rvu_get_lfid_for_pf(int pf, int *nixid, int *npaid)
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{
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union nixx_af_rvu_lf_cfg_debug nix_lf_dbg;
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union npa_af_rvu_lf_cfg_debug npa_lf_dbg;
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union rvu_pf_func_s pf_func;
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struct rvu_af *af = dev_get_priv(rvu_af_dev);
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struct nix_af *nix_af = af->nix_af;
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pf_func.u = 0;
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pf_func.s.pf = pf;
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nix_lf_dbg.u = 0;
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nix_lf_dbg.s.pf_func = pf_func.u & 0xFFFF;
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nix_lf_dbg.s.exec = 1;
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nix_af_reg_write(nix_af, NIXX_AF_RVU_LF_CFG_DEBUG(),
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nix_lf_dbg.u);
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do {
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nix_lf_dbg.u = nix_af_reg_read(nix_af,
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NIXX_AF_RVU_LF_CFG_DEBUG());
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} while (nix_lf_dbg.s.exec);
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if (nix_lf_dbg.s.lf_valid)
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*nixid = nix_lf_dbg.s.lf;
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debug("%s: nix lf_valid %d lf %d nixid %d\n", __func__,
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nix_lf_dbg.s.lf_valid, nix_lf_dbg.s.lf, *nixid);
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npa_lf_dbg.u = 0;
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npa_lf_dbg.s.pf_func = pf_func.u & 0xFFFF;
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npa_lf_dbg.s.exec = 1;
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npa_af_reg_write(nix_af->npa_af, NPA_AF_RVU_LF_CFG_DEBUG(),
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npa_lf_dbg.u);
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do {
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npa_lf_dbg.u = npa_af_reg_read(nix_af->npa_af,
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NPA_AF_RVU_LF_CFG_DEBUG());
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} while (npa_lf_dbg.s.exec);
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if (npa_lf_dbg.s.lf_valid)
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*npaid = npa_lf_dbg.s.lf;
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debug("%s: npa lf_valid %d lf %d npaid %d\n", __func__,
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npa_lf_dbg.s.lf_valid, npa_lf_dbg.s.lf, *npaid);
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}
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struct nix_af *rvu_af_init(struct rvu_af *rvu_af)
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{
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struct nix_af *nix_af;
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union rvu_af_addr_s block_addr;
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int err;
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nix_af = (struct nix_af *)calloc(1, sizeof(struct nix_af));
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if (!nix_af) {
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printf("%s: out of memory\n", __func__);
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goto error;
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}
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nix_af->dev = rvu_af->dev;
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block_addr.u = 0;
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block_addr.s.block = RVU_BLOCK_ADDR_E_NIXX(0);
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nix_af->nix_af_base = rvu_af->af_base + block_addr.u;
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nix_af->npa_af = (struct npa_af *)calloc(1, sizeof(struct npa_af));
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if (!nix_af->npa_af) {
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printf("%s: out of memory\n", __func__);
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goto error;
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}
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block_addr.u = 0;
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block_addr.s.block = RVU_BLOCK_ADDR_E_NPA;
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nix_af->npa_af->npa_af_base = rvu_af->af_base + block_addr.u;
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block_addr.u = 0;
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block_addr.s.block = RVU_BLOCK_ADDR_E_NPC;
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nix_af->npc_af_base = rvu_af->af_base + block_addr.u;
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debug("%s: Setting up npa admin\n", __func__);
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err = npa_af_setup(nix_af->npa_af);
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if (err) {
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printf("%s: Error %d setting up NPA admin\n", __func__, err);
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goto error;
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}
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debug("%s: Setting up nix af\n", __func__);
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err = nix_af_setup(nix_af);
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if (err) {
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printf("%s: Error %d setting up NIX admin\n", __func__, err);
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goto error;
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}
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debug("%s: nix_af: %p\n", __func__, nix_af);
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return nix_af;
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error:
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if (nix_af->npa_af) {
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free(nix_af->npa_af);
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memset(nix_af, 0, sizeof(*nix_af));
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}
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if (nix_af)
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free(nix_af);
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return NULL;
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}
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int rvu_af_probe(struct udevice *dev)
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{
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struct rvu_af *af_ptr = dev_get_priv(dev);
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af_ptr->af_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE,
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PCI_REGION_MEM);
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debug("%s RVU AF BAR %p\n", __func__, af_ptr->af_base);
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af_ptr->dev = dev;
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rvu_af_dev = dev;
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af_ptr->nix_af = rvu_af_init(af_ptr);
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if (!af_ptr->nix_af) {
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printf("%s: Error: could not initialize NIX AF\n", __func__);
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return -1;
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}
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debug("%s: Done\n", __func__);
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return 0;
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}
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int rvu_af_remove(struct udevice *dev)
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{
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struct rvu_af *rvu_af = dev_get_priv(dev);
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nix_af_shutdown(rvu_af->nix_af);
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npa_af_shutdown(rvu_af->nix_af->npa_af);
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npc_af_shutdown(rvu_af->nix_af);
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debug("%s: rvu af down --\n", __func__);
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return 0;
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}
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U_BOOT_DRIVER(rvu_af) = {
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.name = "rvu_af",
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.id = UCLASS_MISC,
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.probe = rvu_af_probe,
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.remove = rvu_af_remove,
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.priv_auto = sizeof(struct rvu_af),
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};
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static struct pci_device_id rvu_af_supported[] = {
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{ PCI_VDEVICE(CAVIUM, PCI_DEVICE_ID_CAVIUM_RVU_AF) },
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{}
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};
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U_BOOT_PCI_DEVICE(rvu_af, rvu_af_supported);
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