u-boot/arch/x86/cpu/ivybridge
Simon Glass 515e8174f5 x86: Update mrccache to support multiple caches
With Apollo Lake we need to support a normal cache, which almost never
changes and a much smaller 'variable' cache which changes every time.

Update the code to add a cache type, use an array for the caches and use a
for loop to iterate over the caches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:14 +08:00
..
bd82x6x.c x86: ivybridge: Implement PCH_REQ_PMBASE_INFO 2019-05-08 13:02:15 +08:00
cpu.c common: Move checkcpu() out of common.h 2019-12-02 18:23:14 -05:00
early_me.c x86: Switch to use DM sysreset driver 2018-07-20 09:33:22 +08:00
fsp_configs.c x86: Rename some FSP functions to have an fsp_ prefix 2019-10-08 13:53:34 +08:00
ivybridge.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig sound: x86: link: Add sound support 2019-02-20 15:27:09 +08:00
lpc.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Makefile x86: ivybridge: Enable 206ax cpu driver for FSP build 2018-06-13 09:50:57 +08:00
model_206ax.c x86: Add common functions for TDP and perf control 2019-10-08 13:57:47 +08:00
northbridge.c x86: Add common functions for TDP and perf control 2019-10-08 13:57:47 +08:00
sata.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
sdram.c x86: Update mrccache to support multiple caches 2019-12-15 11:44:14 +08:00
sdram_nop.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00