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The BSC9132 is a highly integrated device that targets the evolving
Microcell, Picocell, and Enterprise-Femto base station market subsegments.
The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850
core technologies with MAPLE-B2P baseband acceleration processing elements
to address the need for a high performance, low cost, integrated solution
that handles all required processing layers without the need for an
external device except for an RF transceiver or, in a Micro base station
configuration, a host device that handles the L3/L4 and handover between
sectors.
The BSC9132 SoC includes the following function and features:
- Power Architecture subsystem including two e500 processors with
512-Kbyte shared L2 cache
- Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
cache
- 32 Kbyte of shared M3 memory
- The Multi Accelerator Platform Engine for Pico BaseStation Baseband
Processing (MAPLE-B2P)
- Two DDR3/3L memory interfaces with 32-bit data width (40 bits including
ECC), up to 1333 MHz data rate
- Dedicated security engine featuring trusted boot
- Two DMA controllers
- OCNDMA with four bidirectional channels
- SysDMA with sixteen bidirectional channels
- Interfaces
- Four-lane SerDes PHY
- PCI Express controller complies with the PEX Specification-Rev 2.0
- Two Common Public Radio Interface (CPRI) controller lanes
- High-speed USB 2.0 host and device controller with ULPI interface
- Enhanced secure digital (SD/MMC) host controller (eSDHC)
- Antenna interface controller (AIC), supporting four industry
standard JESD207/four custom ADI RF interfaces
- ADI lanes support both full duplex FDD support & half duplex TDD
- Universal Subscriber Identity Module (USIM) interface that
facilitates communication to SIM cards or Eurochip pre-paid phone
cards
- Two DUART, two eSPI, and two I2C controllers
- Integrated Flash memory controller (IFC)
- GPIO
- Sixteen 32-bit timers
Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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| .. | ||
| b4860_ids.c | ||
| b4860_serdes.c | ||
| bsc9132_serdes.c | ||
| cache.c | ||
| cmd_errata.c | ||
| commproc.c | ||
| config.mk | ||
| cpu.c | ||
| cpu_init.c | ||
| cpu_init_early.c | ||
| ddr-gen1.c | ||
| ddr-gen2.c | ||
| ddr-gen3.c | ||
| ether_fcc.c | ||
| fdt.c | ||
| fixed_ivor.S | ||
| fsl_corenet2_serdes.c | ||
| fsl_corenet2_serdes.h | ||
| fsl_corenet_serdes.c | ||
| fsl_corenet_serdes.h | ||
| interrupts.c | ||
| liodn.c | ||
| Makefile | ||
| mp.c | ||
| mp.h | ||
| mpc8536_serdes.c | ||
| mpc8544_serdes.c | ||
| mpc8548_serdes.c | ||
| mpc8568_serdes.c | ||
| mpc8569_serdes.c | ||
| mpc8572_serdes.c | ||
| p1010_serdes.c | ||
| p1021_serdes.c | ||
| p1022_serdes.c | ||
| p1023_serdes.c | ||
| p2020_serdes.c | ||
| p2041_ids.c | ||
| p2041_serdes.c | ||
| p3041_ids.c | ||
| p3041_serdes.c | ||
| p4080_ids.c | ||
| p4080_serdes.c | ||
| p5020_ids.c | ||
| p5020_serdes.c | ||
| p5040_ids.c | ||
| p5040_serdes.c | ||
| pci.c | ||
| portals.c | ||
| qe_io.c | ||
| release.S | ||
| resetvec.S | ||
| serial_scc.c | ||
| speed.c | ||
| spl_minimal.c | ||
| start.S | ||
| t4240_ids.c | ||
| t4240_serdes.c | ||
| tlb.c | ||
| traps.c | ||
| u-boot-nand.lds | ||
| u-boot-nand_spl.lds | ||
| u-boot-spl.lds | ||
| u-boot.lds | ||