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0e35bde7b1
* For cold silicon the DDR timings need to be relaxed in order for the device to boot with DDR at 266MHz * Fix proposed by James Doublesin Signed-off-by: Chase Maupin <Chase.Maupin@ti.com> |
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.. | ||
clock.h | ||
clocks_am33xx.h | ||
common_def.h | ||
cpu.h | ||
ddr_defs.h | ||
hardware.h | ||
i2c.h | ||
mmc_host_def.h | ||
omap.h | ||
sys_proto.h |