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u-boot/board/freescale/ls1021aiot
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Shiji Yang 506df9dc58 treewide: rework linker symbol declarations in sections header 
1. Convert all linker symbols to char[] type so that we can get the
   corresponding address by calling array name 'var' or its address
   '&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
   not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
   only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
   standard header file to declare them.

[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL

Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-09 09:21:42 -04:00
..
Kconfig nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig 2022-07-05 17:03:02 -04:00
ls102xa_pbi.cfg armv7: Add support of ls1021a-iot board 2016-11-21 09:20:32 -08:00
ls102xa_rcw_sd.cfg armv7: Add support of ls1021a-iot board 2016-11-21 09:20:32 -08:00
ls1021aiot.c treewide: rework linker symbol declarations in sections header 2023-08-09 09:21:42 -04:00
MAINTAINERS board: ls1021aiot: Update MAINTAINERS 2021-03-05 10:25:42 +05:30
Makefile video: fsl: colibri_vf: Drop FSL DCU driver 2022-03-28 20:18:07 +02:00
psci.S SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
README armv7: Add support of ls1021a-iot board 2016-11-21 09:20:32 -08:00

README 

Overview
--------
The LS1021A-IOT is a Freescale reference board that hosts
the LS1021A SoC.

LS1021AIOT board Overview
-------------------------
 - DDR Controller
	- Supports 1GB un-buffered DDR3L SDRAM discrete
	devices(32-bit bus) with 4 bit ECC
	- DDR power supplies 1.35V to all devices with
	automatic tracking of VTT
	- Soldered DDR chip
	- Supprot one fixed speed
 - Ethernet
	- Two on-board SGMII 10/100/1G ethernet ports
	- One Gbit Etherent RGMII interface to 4-ports switch
	with 4x 10/100/1000 RJ145 ports
 - CPLD
	- 8-bit registers in CPLD for system configuration
	- connected to IFC_AD[0:7]
 - Power Supplies
	- 12V@5A DC
 - SDHC
	- SDHC port connects directly to a full 8-bit SD/MMC slot
	- Support for SDIO devices
 - USB
	- Two on-board USB 3.0
	- One on-board USB k22
 - PCIe
	- Two MiniPCIe Solts
 - SATA
	- Support SATA Connector
 - AUDIO
	- AUDIO in and out
 - I/O Expansion
	- Arduino Shield Connector
	- Port0 - CAN/GPIO/Flextimer
	- Port1 - GPIO/CPLD Expansion
	- Port2 - SPI/I2C/UART

Memory map
-----------
The addresses in brackets are physical addresses.

Start Address	End Address		Description			Size
0x00_0100_0000	0x00_0FFF_FFFF	CCSRBAR				240MB
0x00_4000_0000	0x00_43FF_FFFF	QSPI(Chip select 0)	64MB
0x00_4400_0000	0x00_47FF_FFFF	QSPI(Chip select 1)	64MB
0x00_6000_0000	0x00_6000_FFFF	CPLD				64K
0x00_8000_0000	0x00_BFFF_FFFF	DDR					1GB

Boot description
-----------------
LS1021A-IOT support two ways of boot:
Qspi boot and SD boot
The board doesn't support boot from another
source without changing any switch/jumper.