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https://github.com/AsahiLinux/u-boot
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7f900eabf7
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the linux kernel v5.14.12. Notable changes: - second watchdog added - the number of chip selects of the SPI controller is now correct and reflects what the hardware offers - the LPUARTs have the correct clock parent - USB controllers are enabled by default, which was already the case before this sync because all board enabled all the USB controller nodes. A linux patch to fix this is pending. - the eSDHC controller changes from big-endian to little-endian, but that property seems to be not used at all. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
15 lines
374 B
C
15 lines
374 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef DT_CLOCK_FSL_QORIQ_CLOCKGEN_H
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#define DT_CLOCK_FSL_QORIQ_CLOCKGEN_H
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#define QORIQ_CLK_SYSCLK 0
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#define QORIQ_CLK_CMUX 1
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#define QORIQ_CLK_HWACCEL 2
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#define QORIQ_CLK_FMAN 3
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#define QORIQ_CLK_PLATFORM_PLL 4
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#define QORIQ_CLK_CORECLK 5
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#define QORIQ_CLK_PLL_DIV(x) ((x) - 1)
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#endif /* DT_CLOCK_FSL_QORIQ_CLOCKGEN_H */
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