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u-boot/arch/x86
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Simon Glass 2b6051541b x86: ivybridge: Add early LPC init so that serial works 
The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device
which provides a serial port. This is accessible on Chromebooks, so enable
it early in the boot process.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 07:34:12 +01:00
..
cpu x86: ivybridge: Add early LPC init so that serial works 2014-11-21 07:34:12 +01:00
dts x86: ivybridge: Add early LPC init so that serial works 2014-11-21 07:34:12 +01:00
include/asm x86: ivybridge: Add early LPC init so that serial works 2014-11-21 07:34:12 +01:00
lib x86: Allow timer calibration to work on ivybridge 2014-11-21 07:24:12 +01:00
config.mk x86: Remove REALMODE_BASE which is no longer used 2014-11-21 07:24:08 +01:00
Kconfig x86: chromebook_link: Implement CAR support (cache as RAM) 2014-11-21 07:34:11 +01:00