Ran Wang 2ab1553f08 armv8: Add workaround for USB erratum A-009008 ... USB High Speed (HS) EYE Height Adjustment USB HS speed eye diagram fails with the default value at many corners, particularly at a high temperature Optimal eye at TXREFTUNE value to 0x9 is observed, change set the same value. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by: York Sun <york.sun@nxp.com>		2017-09-11 08:01:06 -07:00
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clock.h	common: freescale: Move arch-specific declarations	2017-06-05 12:30:55 -04:00
config.h	armv8: ls1088a: Add NXP LS1088A SoC support	2017-09-11 08:00:13 -07:00
cpu.h	armv8: ls1088a: Add NXP LS1088A SoC support	2017-09-11 08:00:13 -07:00
fdt.h	armv8/layerscape: remove unnecessary function declares	2017-01-18 09:24:51 -08:00
fsl_serdes.h	armv8: fsl-layerscape: Support to add RGMII for ls1088aqds	2017-09-11 08:01:05 -07:00
immap_lsch2.h	armv8: Add workaround for USB erratum A-009008	2017-09-11 08:01:06 -07:00
immap_lsch3.h	armv8: Add workaround for USB erratum A-009008	2017-09-11 08:01:06 -07:00
imx-regs.h	serial: lpuart: restructure lpuart driver	2017-03-17 09:27:08 +01:00
mmu.h	armv8: layerscape: Update early MMU for DDR after initialization	2017-03-14 08:44:03 -07:00
mp.h	armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64	2017-08-01 08:28:56 -07:00
ns_access.h	fsl: csu: add an API to set R/W permission to PCIe	2016-09-14 14:07:08 -07:00
ppa.h	fsl-layerscape/ppa: cleanup ppa.h	2017-03-28 08:59:47 -07:00
soc.h	armv8: Add scfg_clrsetbits_32(), scfg_clrbits_32()	2017-09-11 08:01:05 -07:00
speed.h	armv8/fsl_lsch3: Change arch to fsl-layerscape	2015-10-29 10:34:00 -07:00
stream_id_lsch2.h	arvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2	2017-03-28 10:47:16 -07:00
stream_id_lsch3.h	armv8: ls1088a: Add NXP LS1088A SoC support	2017-09-11 08:00:13 -07:00