mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 10:18:38 +00:00
9774462e34
With the exceptions of ds109, ds414, icnova-a20-swac, nokia_rx51 and stemmy, disable ATAG support. A large number of platforms had enabled support but never supported a kernel so old as to require it. Further, some platforms are old enough to support both, but are well supported by devicetree booting, and have been for a number of years. This is because some of the ATAGs related functions have been re-used to provide the same kind of information, but for devicetree or just generally to inform the user. When needed still, rename these functions to get_board_revision() instead, to avoid conflicts. In other cases, these functions were simply unused, so drop them. Cc: Andre Przywara <andre.przywara@arm.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Phil Sutter <phil@nwl.cc> Cc: Stefan Bosch <stefan_b@posteo.net> Signed-off-by: Tom Rini <trini@konsulko.com>
246 lines
5.3 KiB
C
246 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2011 Freescale Semiconductor, Inc.
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* Jason Liu <r64343@freescale.com>
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*/
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#include <common.h>
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#include <init.h>
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#include <log.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux-mx53.h>
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#include <asm/arch/clock.h>
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#include <env.h>
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#include <linux/errno.h>
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#include <asm/mach-imx/mx5_video.h>
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#include <i2c.h>
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#include <input.h>
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#include <fsl_esdhc_imx.h>
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#include <asm/gpio.h>
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#include <power/pmic.h>
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#include <dialog_pmic.h>
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#include <fsl_pmic.h>
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#include <linux/fb.h>
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#include <ipu_pixfmt.h>
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#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24)
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_REVISION_TAG
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u32 get_board_rev(void)
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{
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struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
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struct fuse_bank *bank = &iim->bank[0];
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struct fuse_bank0_regs *fuse =
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(struct fuse_bank0_regs *)bank->fuse_regs;
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int rev = readl(&fuse->gp[6]);
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if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR))
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rev = 0;
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return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
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}
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#endif
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#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
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static void setup_iomux_uart(void)
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{
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static const iomux_v3_cfg_t uart_pads[] = {
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NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
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}
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#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
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static void setup_iomux_i2c(void)
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{
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static const iomux_v3_cfg_t i2c1_pads[] = {
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NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
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NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
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}
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static int power_init(void)
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{
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unsigned int val;
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int ret;
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struct pmic *p;
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if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) {
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ret = pmic_dialog_init(I2C_PMIC);
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if (ret)
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return ret;
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p = pmic_get("DIALOG_PMIC");
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if (!p)
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return -ENODEV;
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env_set("fdt_file", "imx53-qsb.dtb");
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/* Set VDDA to 1.25V */
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val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
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ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
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if (ret) {
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printf("Writing to BUCKCORE_REG failed: %d\n", ret);
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return ret;
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}
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pmic_reg_read(p, DA9053_SUPPLY_REG, &val);
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val |= DA9052_SUPPLY_VBCOREGO;
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ret = pmic_reg_write(p, DA9053_SUPPLY_REG, val);
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if (ret) {
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printf("Writing to SUPPLY_REG failed: %d\n", ret);
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return ret;
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}
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/* Set Vcc peripheral to 1.30V */
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ret = pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62);
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if (ret) {
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printf("Writing to BUCKPRO_REG failed: %d\n", ret);
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return ret;
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}
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ret = pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62);
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if (ret) {
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printf("Writing to SUPPLY_REG failed: %d\n", ret);
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return ret;
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}
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return ret;
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}
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if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) {
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ret = pmic_init(I2C_0);
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if (ret)
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return ret;
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p = pmic_get("FSL_PMIC");
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if (!p)
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return -ENODEV;
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env_set("fdt_file", "imx53-qsrb.dtb");
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/* Set VDDGP to 1.25V for 1GHz on SW1 */
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pmic_reg_read(p, REG_SW_0, &val);
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val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708;
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ret = pmic_reg_write(p, REG_SW_0, val);
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if (ret) {
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printf("Writing to REG_SW_0 failed: %d\n", ret);
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return ret;
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}
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/* Set VCC as 1.30V on SW2 */
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pmic_reg_read(p, REG_SW_1, &val);
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val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708;
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ret = pmic_reg_write(p, REG_SW_1, val);
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if (ret) {
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printf("Writing to REG_SW_1 failed: %d\n", ret);
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return ret;
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}
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/* Set global reset timer to 4s */
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pmic_reg_read(p, REG_POWER_CTL2, &val);
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val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708;
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ret = pmic_reg_write(p, REG_POWER_CTL2, val);
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if (ret) {
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printf("Writing to REG_POWER_CTL2 failed: %d\n", ret);
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return ret;
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}
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/* Set VUSBSEL and VUSBEN for USB PHY supply*/
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pmic_reg_read(p, REG_MODE_0, &val);
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val |= (VUSBSEL_MC34708 | VUSBEN_MC34708);
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ret = pmic_reg_write(p, REG_MODE_0, val);
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if (ret) {
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printf("Writing to REG_MODE_0 failed: %d\n", ret);
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return ret;
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}
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/* Set SWBST to 5V in auto mode */
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val = SWBST_AUTO;
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ret = pmic_reg_write(p, SWBST_CTRL, val);
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if (ret) {
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printf("Writing to SWBST_CTRL failed: %d\n", ret);
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return ret;
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}
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return ret;
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}
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return -1;
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}
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static void clock_1GHz(void)
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{
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int ret;
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u32 ref_clk = MXC_HCLK;
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/*
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* After increasing voltage to 1.25V, we can switch
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* CPU clock to 1GHz and DDR to 400MHz safely
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*/
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ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
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if (ret)
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printf("CPU: Switch CPU clock to 1GHZ failed\n");
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ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
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ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
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if (ret)
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printf("CPU: Switch DDR clock to 400MHz failed\n");
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}
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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setup_iomux_lcd();
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return 0;
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}
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/*
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* Do not overwrite the console
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* Use always serial for U-Boot console
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*/
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int overwrite_console(void)
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{
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return 1;
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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mxc_set_sata_internal_clock();
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setup_iomux_i2c();
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return 0;
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}
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int board_late_init(void)
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{
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if (!power_init())
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clock_1GHz();
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: MX53 LOCO\n");
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return 0;
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}
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