mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-27 23:21:01 +00:00
6f796a9bb4
Allwinner H6 is a new SoC from Allwinner features USB3 and PCIe interfaces. This patch adds support for it. The corresponding DTSI file, from Linux next-20180720, is also introduced. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
24 lines
510 B
C
24 lines
510 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
|
|
*/
|
|
|
|
#ifndef _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_
|
|
#define _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_
|
|
|
|
#define CLK_AR100 0
|
|
|
|
#define CLK_R_APB1 2
|
|
|
|
#define CLK_R_APB1_TIMER 4
|
|
#define CLK_R_APB1_TWD 5
|
|
#define CLK_R_APB1_PWM 6
|
|
#define CLK_R_APB2_UART 7
|
|
#define CLK_R_APB2_I2C 8
|
|
#define CLK_R_APB1_IR 9
|
|
#define CLK_R_APB1_W1 10
|
|
|
|
#define CLK_IR 11
|
|
#define CLK_W1 12
|
|
|
|
#endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */
|