mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
3f7e032f70
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS) subsystems/clusters. One R5F cluster is present within the MCU domain (MCU_R5FSS0), and the other one is present within the MAIN domain (MAIN_R5FSS0). Each of these can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in LockStep-mode to provide a larger 128 KB of memory. Add the DT node for the MAIN domain R5F cluster/subsystem, the two R5F cores are added as child nodes to the main cluster/subsystem node. The cluster is configured to run in Split-mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. Signed-off-by: Suman Anna <s-anna@ti.com>
202 lines
4.2 KiB
Text
202 lines
4.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/net/ti-dp83867.h>
|
|
#include "k3-j7200-som-p0.dtsi"
|
|
|
|
/ {
|
|
chosen {
|
|
stdout-path = "serial2:115200n8";
|
|
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
|
|
};
|
|
|
|
aliases {
|
|
remoteproc0 = &mcu_r5fss0_core0;
|
|
remoteproc1 = &mcu_r5fss0_core1;
|
|
remoteproc2 = &main_r5fss0_core0;
|
|
remoteproc3 = &main_r5fss0_core1;
|
|
};
|
|
};
|
|
|
|
&wkup_pmx0 {
|
|
wkup_i2c0_pins_default: wkup-i2c0-pins-default {
|
|
pinctrl-single,pins = <
|
|
J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
|
|
J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
|
|
>;
|
|
};
|
|
|
|
wkup_gpio_pins_default: wkup-gpio-pins-default {
|
|
pinctrl-single,pins = <
|
|
J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
|
|
>;
|
|
};
|
|
|
|
mcu_cpsw_pins_default: mcu_cpsw_pins_default {
|
|
pinctrl-single,pins = <
|
|
J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
|
|
J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
|
|
J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
|
|
J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
|
|
J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
|
|
J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
|
|
J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
|
|
J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
|
|
J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
|
|
J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
|
|
J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
|
|
J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
|
|
>;
|
|
};
|
|
|
|
mcu_mdio_pins_default: mcu_mdio1_pins_default {
|
|
pinctrl-single,pins = <
|
|
J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
|
|
J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&main_pmx0 {
|
|
main_i2c0_pins_default: main-i2c0-pins-default {
|
|
pinctrl-single,pins = <
|
|
J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
|
|
J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
|
|
>;
|
|
};
|
|
|
|
main_usbss0_pins_default: main_usbss0_pins_default {
|
|
pinctrl-single,pins = <
|
|
J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&wkup_uart0 {
|
|
/* Wakeup UART is used by System firmware */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart0 {
|
|
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
|
|
};
|
|
|
|
&main_uart2 {
|
|
/* MAIN UART 2 is used by R5F firmware */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart3 {
|
|
/* UART not brought out */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart4 {
|
|
/* UART not brought out */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart5 {
|
|
/* UART not brought out */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart6 {
|
|
/* UART not brought out */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart7 {
|
|
/* UART not brought out */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart8 {
|
|
/* UART not brought out */
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_uart9 {
|
|
/* UART not brought out */
|
|
status = "disabled";
|
|
};
|
|
|
|
&wkup_i2c0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&wkup_i2c0_pins_default>;
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&main_sdhci0 {
|
|
/* eMMC */
|
|
non-removable;
|
|
ti,driver-strength-ohm = <50>;
|
|
disable-wp;
|
|
};
|
|
|
|
&main_sdhci1 {
|
|
/* SD card */
|
|
ti,driver-strength-ohm = <50>;
|
|
disable-wp;
|
|
no-1-8-v;
|
|
sdhci-caps-mask = <0x8000000F 0x0>;
|
|
};
|
|
|
|
&main_i2c0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_i2c0_pins_default>;
|
|
clock-frequency = <400000>;
|
|
|
|
exp1: gpio@20 {
|
|
compatible = "ti,tca6416";
|
|
reg = <0x20>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
|
|
exp2: gpio@22 {
|
|
compatible = "ti,tca6424";
|
|
reg = <0x22>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
};
|
|
|
|
&usbss0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_usbss0_pins_default>;
|
|
ti,vbus-divider;
|
|
ti,usb2-only;
|
|
};
|
|
|
|
&usb0 {
|
|
dr_mode = "otg";
|
|
maximum-speed = "high-speed";
|
|
};
|
|
|
|
&wkup_gpio0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&wkup_gpio_pins_default>;
|
|
};
|
|
|
|
&mcu_cpsw {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
|
|
};
|
|
|
|
&davinci_mdio {
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
|
};
|
|
};
|
|
|
|
&cpsw_port1 {
|
|
phy-mode = "rgmii-rxid";
|
|
phy-handle = <&phy0>;
|
|
};
|