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arm: dts: k3-j7200-main: Add MAIN domain R5F cluster nodes

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The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.

Add the DT node for the MAIN domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in Split-mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.

Signed-off-by: Suman Anna <s-anna@ti.com>
This commit is contained in:
Suman Anna 2020-08-17 18:15:11 -05:00 committed by Lokesh Vutla
parent 10c4de02f0
commit 3f7e032f70
2 changed files with 42 additions and 0 deletions
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2
arch/arm/dts/k3-j7200-common-proc-board.dts
View file

@ -17,6 +17,8 @@
aliases {
remoteproc0 = &mcu_r5fss0_core0;
remoteproc1 = &mcu_r5fss0_core1;
remoteproc2 = &main_r5fss0_core0;
remoteproc3 = &main_r5fss0_core1;
};
};

40
arch/arm/dts/k3-j7200-main.dtsi
View file

@ -340,4 +340,44 @@
dr_mode = "otg";
};
};
main_r5fss0: r5fss@5c00000 {
compatible = "ti,j7200-r5fss";
lockstep-mode = <0>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
<0x5d00000 0x00 0x5d00000 0x20000>;
power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
main_r5fss0_core0: r5f@5c00000 {
compatible = "ti,j7200-r5f";
reg = <0x5c00000 0x00010000>,
<0x5c10000 0x00010000>;
reg-names = "atcm", "btcm";
ti,sci = <&dmsc>;
ti,sci-dev-id = <245>;
ti,sci-proc-ids = <0x06 0xFF>;
resets = <&k3_reset 245 1>;
firmware-name = "j7200-main-r5f0_0-fw";
atcm-enable = <1>;
btcm-enable = <1>;
loczrama = <1>;
};
main_r5fss0_core1: r5f@5d00000 {
compatible = "ti,j7200-r5f";
reg = <0x5d00000 0x00008000>,
<0x5d10000 0x00008000>;
reg-names = "atcm", "btcm";
ti,sci = <&dmsc>;
ti,sci-dev-id = <246>;
ti,sci-proc-ids = <0x07 0xFF>;
resets = <&k3_reset 246 1>;
firmware-name = "j7200-main-r5f0_1-fw";
atcm-enable = <1>;
btcm-enable = <1>;
loczrama = <1>;
};
};
};