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u-boot/board/freescale/imx8ulp_evk
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Ye Li 9c7fbebe5d imx8ulp: Workaround LPOSC_TRIM fuse load issue 
8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0
LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision.

A0.2 will fix the issue in ROM. But A0.1 we have to workaround
it in SPL by setting LPOSCCTRL BIASCURRENT again.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05 13:38:39 +01:00
..
ddr_init.c arm: imx: add i.MX8ULP EVK support 2021-08-09 14:46:51 +02:00
imx8ulp_evk.c imx8ulp_evk: Control LPI2C0 PCA6416 and TPM0 for display 2022-02-05 13:38:38 +01:00
Kconfig arm: imx: add i.MX8ULP EVK support 2021-08-09 14:46:51 +02:00
lpddr4_timing.c arm: imx: add i.MX8ULP EVK support 2021-08-09 14:46:51 +02:00
MAINTAINERS arm: imx: add i.MX8ULP EVK support 2021-08-09 14:46:51 +02:00
Makefile arm: imx: add i.MX8ULP EVK support 2021-08-09 14:46:51 +02:00
spl.c imx8ulp: Workaround LPOSC_TRIM fuse load issue 2022-02-05 13:38:39 +01:00