mirror of
https://github.com/AsahiLinux/u-boot
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611 lines
17 KiB
Text
611 lines
17 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
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*
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* Base Board: https://www.ti.com/lit/zip/SPRR463
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*/
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/dts-v1/;
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#include "k3-am68-sk-som.dtsi"
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#include <dt-bindings/net/ti-dp83867.h>
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#include <dt-bindings/phy/phy-cadence.h>
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#include <dt-bindings/phy/phy.h>
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#include "k3-serdes.h"
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/ {
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compatible = "ti,am68-sk", "ti,j721s2";
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model = "Texas Instruments AM68 SK";
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chosen {
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stdout-path = "serial2:115200n8";
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};
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aliases {
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serial0 = &wkup_uart0;
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serial1 = &mcu_uart0;
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serial2 = &main_uart8;
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mmc1 = &main_sdhci1;
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can0 = &mcu_mcan0;
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can1 = &mcu_mcan1;
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can2 = &main_mcan6;
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can3 = &main_mcan7;
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};
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vusb_main: regulator-vusb-main5v0 {
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/* USB MAIN INPUT 5V DC */
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compatible = "regulator-fixed";
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regulator-name = "vusb-main5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_3v3: regulator-vsys3v3 {
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/* Output of LM5141 */
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compatible = "regulator-fixed";
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regulator-name = "vsys_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vusb_main>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_mmc1: regulator-sd {
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/* Output of TPS22918 */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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vin-supply = <&vsys_3v3>;
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gpio = <&exp1 8 GPIO_ACTIVE_HIGH>;
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};
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vdd_sd_dv: regulator-tlv71033 {
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/* Output of TLV71033 */
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compatible = "regulator-gpio";
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regulator-name = "tlv71033";
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_sd_dv_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vsys_3v3>;
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gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
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vsys_io_1v8: regulator-vsys-io-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vsys_io_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vsys_io_1v2: regulator-vsys-io-1v2 {
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compatible = "regulator-fixed";
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regulator-name = "vsys_io_1v2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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regulator-boot-on;
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};
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transceiver1: can-phy0 {
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compatible = "ti,tcan1042";
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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};
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transceiver2: can-phy1 {
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compatible = "ti,tcan1042";
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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};
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transceiver3: can-phy2 {
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compatible = "ti,tcan1042";
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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};
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transceiver4: can-phy3 {
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compatible = "ti,tcan1042";
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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};
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connector-hdmi {
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compatible = "hdmi-connector";
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label = "hdmi";
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type = "a";
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_hpd_pins_default>;
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ddc-i2c-bus = <&mcu_i2c1>;
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/* HDMI_HPD */
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hpd-gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>;
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&tfp410_out>;
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};
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};
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};
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bridge-dvi {
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compatible = "ti,tfp410";
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/* HDMI_PDn */
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powerdown-gpios = <&exp2 0 GPIO_ACTIVE_LOW>;
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ti,deskew = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tfp410_in: endpoint {
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remote-endpoint = <&dpi_out0>;
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pclk-sample = <1>;
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};
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};
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port@1 {
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reg = <1>;
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tfp410_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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};
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&main_pmx0 {
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main_uart8_pins_default: main-uart8-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
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J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
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>;
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};
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main_i2c0_pins_default: main-i2c0-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x0e0, PIN_INPUT, 0) /* (AH25) I2C0_SCL */
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J721S2_IOPAD(0x0e4, PIN_INPUT, 0) /* (AE24) I2C0_SDA */
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>;
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};
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main_mmc1_pins_default: main-mmc1-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
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J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
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J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
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J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
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J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
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J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
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J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
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>;
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};
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vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x0c4, PIN_INPUT, 7) /* (AB26) ECAP0_IN_APWM_OUT.GPIO0_49 */
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>;
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};
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main_usbss0_pins_default: main-usbss0-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
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>;
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};
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main_mcan6_pins_default: main-mcan6-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x098, PIN_INPUT, 0) /* (V25) MCASP0_AXR10.MCAN6_RX */
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J721S2_IOPAD(0x094, PIN_INPUT, 0) /* (AA25) MCASP0_AXR9.MCAN6_TX */
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>;
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};
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main_mcan7_pins_default: main-mcan7-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR12.MCAN7_RX */
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J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */
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>;
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};
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main_i2c4_pins_default: main-i2c4-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */
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J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */
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>;
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};
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rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x0a8, PIN_INPUT, 7) /* (U24) MCASP0_AXR14.GPIO0_42 */
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J721S2_IOPAD(0x090, PIN_INPUT, 7) /* (W24) MCASP0_AXR8.GPIO0_36 */
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J721S2_IOPAD(0x0bc, PIN_INPUT, 7) /* (V28) MCASP1_AFSX.GPIO0_47 */
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J721S2_IOPAD(0x06c, PIN_INPUT, 7) /* (V26) MCAN1_TX.GPIO0_27 */
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J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
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J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
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J721S2_IOPAD(0x0b8, PIN_INPUT, 7) /* (AA24) MCASP1_ACLKX.GPIO0_46 */
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J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
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J721S2_IOPAD(0x034, PIN_INPUT, 7) /* (AD24) PMIC_WAKE0.GPIO0_13 */
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J721S2_IOPAD(0x0a4, PIN_INPUT, 7) /* (T23) MCASP0_AXR13.GPIO0_41 */
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J721S2_IOPAD(0x0c0, PIN_INPUT, 7) /* (T28) MCASP1_AXR0.GPIO0_48 */
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J721S2_IOPAD(0x0b4, PIN_INPUT, 7) /* (U25) MCASP1_AXR4.GPIO0_45 */
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J721S2_IOPAD(0x0cc, PIN_INPUT, 7) /* (AE27) SPI0_CS0.GPIO0_51 */
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J721S2_IOPAD(0x08c, PIN_INPUT, 7) /* (T25) MCASP0_AXR7.GPIO0_35 */
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>;
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};
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dss_vout0_pins_default: dss-vout0-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x074, PIN_OUTPUT, 2) /* (R28) MCAN2_TX.VOUT0_DATA0 */
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J721S2_IOPAD(0x070, PIN_OUTPUT, 2) /* (R27) MCAN1_RX.VOUT0_DATA1 */
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J721S2_IOPAD(0x04c, PIN_OUTPUT, 2) /* (V27) MCASP1_AXR1.VOUT0_DATA10 */
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J721S2_IOPAD(0x048, PIN_OUTPUT, 2) /* (AB27) MCASP0_AXR2.VOUT0_DATA11 */
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J721S2_IOPAD(0x044, PIN_OUTPUT, 2) /* (Y26) MCASP0_AXR1.VOUT0_DATA12 */
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J721S2_IOPAD(0x040, PIN_OUTPUT, 2) /* (AC28) MCASP0_AXR0.VOUT0_DATA13 */
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J721S2_IOPAD(0x03c, PIN_OUTPUT, 2) /* (U27) MCASP0_AFSX.VOUT0_DATA14 */
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J721S2_IOPAD(0x038, PIN_OUTPUT, 2) /* (AB28) MCASP0_ACLKX.VOUT0_DATA15 */
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J721S2_IOPAD(0x0c8, PIN_OUTPUT, 2) /* (AD28) EXT_REFCLK1.VOUT0_DATA16 */
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J721S2_IOPAD(0x030, PIN_OUTPUT, 2) /* (T26) GPIO0_12.VOUT0_DATA17 */
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J721S2_IOPAD(0x02c, PIN_OUTPUT, 2) /* (V23) GPIO0_11.VOUT0_DATA18 */
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J721S2_IOPAD(0x028, PIN_OUTPUT, 2) /* (AB24) MCAN16_RX.VOUT0_DATA19 */
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J721S2_IOPAD(0x07c, PIN_OUTPUT, 2) /* (T27) MCASP0_AXR3.VOUT0_DATA2 */
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J721S2_IOPAD(0x024, PIN_OUTPUT, 2) /* (Y28) MCAN16_TX.VOUT0_DATA20 */
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J721S2_IOPAD(0x020, PIN_OUTPUT, 2) /* (AA23) MCAN15_RX.VOUT0_DATA21 */
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J721S2_IOPAD(0x01c, PIN_OUTPUT, 2) /* (Y24) MCAN15_TX.VOUT0_DATA22 */
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J721S2_IOPAD(0x018, PIN_OUTPUT, 2) /* (W23) MCAN14_RX.VOUT0_DATA23 */
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J721S2_IOPAD(0x068, PIN_OUTPUT, 2) /* (U28) MCAN0_RX.VOUT0_DATA3 */
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J721S2_IOPAD(0x064, PIN_OUTPUT, 2) /* (W28) MCAN0_TX.VOUT0_DATA4 */
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J721S2_IOPAD(0x060, PIN_OUTPUT, 2) /* (AC27) MCASP2_AXR1.VOUT0_DATA5 */
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J721S2_IOPAD(0x05c, PIN_OUTPUT, 2) /* (AA26) MCASP2_AXR0.VOUT0_DATA6 */
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J721S2_IOPAD(0x058, PIN_OUTPUT, 2) /* (AA27) MCASP2_AFSX.VOUT0_DATA7 */
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J721S2_IOPAD(0x054, PIN_OUTPUT, 2) /* (Y27) MCASP2_ACLKX.VOUT0_DATA8 */
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J721S2_IOPAD(0x050, PIN_OUTPUT, 2) /* (W27) MCASP1_AXR2.VOUT0_DATA9 */
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J721S2_IOPAD(0x084, PIN_OUTPUT, 2) /* (AA28) MCASP0_AXR5.VOUT0_DE */
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J721S2_IOPAD(0x080, PIN_OUTPUT, 2) /* (U26) MCASP0_AXR4.VOUT0_HSYNC */
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J721S2_IOPAD(0x078, PIN_OUTPUT, 2) /* (Y25) MCAN2_RX.VOUT0_PCLK */
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J721S2_IOPAD(0x088, PIN_OUTPUT, 2) /* (AD27) MCASP0_AXR6.VOUT0_VP0_VSYNC */
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>;
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};
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hdmi_hpd_pins_default: hdmi-hpd-default-pins {
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pinctrl-single,pins = <
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J721S2_IOPAD(0x000, PIN_INPUT, 7) /* (AG24) EXTINTN.GPIO0_0 */
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>;
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};
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};
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&wkup_pmx2 {
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wkup_uart0_pins_default: wkup-uart0-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */
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J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */
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J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
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J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
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>;
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};
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mcu_cpsw_pins_default: mcu-cpsw-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x02C, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
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J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
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J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
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J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
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J721S2_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
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J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
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J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
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J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
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J721S2_WKUP_IOPAD(0x00C, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
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J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
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J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
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J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
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>;
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};
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mcu_mdio_pins_default: mcu-mdio-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
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J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
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>;
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};
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mcu_mcan0_pins_default: mcu-mcan0-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
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J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
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>;
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};
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mcu_mcan1_pins_default: mcu-mcan1-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x06C, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
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J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/
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>;
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};
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mcu_i2c0_pins_default: mcu-i2c0-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (G24) MCU_I2C0_SCL */
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J721S2_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (J25) MCU_I2C0_SDA */
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>;
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};
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mcu_i2c1_pins_default: mcu-i2c1-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x078, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */
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J721S2_WKUP_IOPAD(0x07c, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */
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>;
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};
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mcu_uart0_pins_default: mcu-uart0-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
|
|
J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
|
|
>;
|
|
};
|
|
|
|
mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {
|
|
pinctrl-single,pins = <
|
|
J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */
|
|
J721S2_WKUP_IOPAD(0x05C, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */
|
|
J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_2 */
|
|
J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0_0 */
|
|
J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/
|
|
J721S2_WKUP_IOPAD(0x0B8, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */
|
|
J721S2_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */
|
|
J721S2_WKUP_IOPAD(0x11C, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */
|
|
J721S2_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0_3 */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&wkup_pmx3 {
|
|
mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-default-pins-1 {
|
|
pinctrl-single,pins = <
|
|
J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&main_gpio0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rpi_header_gpio0_pins_default>;
|
|
};
|
|
|
|
&wkup_gpio0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>;
|
|
};
|
|
|
|
&wkup_uart0 {
|
|
status = "reserved";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&wkup_uart0_pins_default>;
|
|
};
|
|
|
|
&mcu_uart0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_uart0_pins_default>;
|
|
};
|
|
|
|
&main_uart8 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_uart8_pins_default>;
|
|
/* Shared with TFA on this platform */
|
|
power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
|
|
};
|
|
|
|
&main_i2c0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_i2c0_pins_default>;
|
|
clock-frequency = <400000>;
|
|
|
|
exp1: gpio@21 {
|
|
compatible = "ti,tca6416";
|
|
reg = <0x21>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
gpio-line-names = " ", " ", " ", " ", " ",
|
|
"BOARDID_EEPROM_WP", "CAN_STB", " ",
|
|
"GPIO_uSD_PWR_EN", " ", "IO_EXP_PCIe1_M.2_RTSz",
|
|
"IO_EXP_MCU_RGMII_RST#", " ", " ", " ", " ";
|
|
};
|
|
};
|
|
|
|
&main_i2c4 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_i2c4_pins_default>;
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&mcu_i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_i2c0_pins_default>;
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&mcu_i2c1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_i2c1_pins_default>;
|
|
/* i2c1 is used for DVI DDC, so we need to use 100kHz */
|
|
clock-frequency = <100000>;
|
|
|
|
exp2: gpio@20 {
|
|
compatible = "ti,tca6408";
|
|
reg = <0x20>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
gpio-line-names = "HDMI_PDn","HDMI_LS_OE",
|
|
"DP0_3V3_EN","eDP_ENABLE";
|
|
};
|
|
};
|
|
|
|
&main_sdhci1 {
|
|
/* SD card */
|
|
status = "okay";
|
|
pinctrl-0 = <&main_mmc1_pins_default>;
|
|
pinctrl-names = "default";
|
|
disable-wp;
|
|
vmmc-supply = <&vdd_mmc1>;
|
|
vqmmc-supply = <&vdd_sd_dv>;
|
|
};
|
|
|
|
&mcu_cpsw {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
|
|
};
|
|
|
|
&davinci_mdio {
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
|
ti,min-output-impedance;
|
|
};
|
|
};
|
|
|
|
&cpsw_port1 {
|
|
phy-mode = "rgmii-rxid";
|
|
phy-handle = <&phy0>;
|
|
};
|
|
|
|
&mcu_mcan0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_mcan0_pins_default>;
|
|
phys = <&transceiver1>;
|
|
};
|
|
|
|
&mcu_mcan1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcu_mcan1_pins_default>;
|
|
phys = <&transceiver2>;
|
|
};
|
|
|
|
&main_mcan6 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_mcan6_pins_default>;
|
|
phys = <&transceiver3>;
|
|
};
|
|
|
|
&main_mcan7 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&main_mcan7_pins_default>;
|
|
phys = <&transceiver4>;
|
|
};
|
|
|
|
&dss {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&dss_vout0_pins_default>;
|
|
/*
|
|
* These clock assignments are chosen to enable the following outputs:
|
|
*
|
|
* VP0 - DisplayPort SST
|
|
* VP1 - DPI0
|
|
* VP2 - DSI
|
|
* VP3 - DPI1
|
|
*/
|
|
assigned-clocks = <&k3_clks 158 2>,
|
|
<&k3_clks 158 5>,
|
|
<&k3_clks 158 14>,
|
|
<&k3_clks 158 18>;
|
|
assigned-clock-parents = <&k3_clks 158 3>,
|
|
<&k3_clks 158 7>,
|
|
<&k3_clks 158 16>,
|
|
<&k3_clks 158 22>;
|
|
};
|
|
|
|
&dss_ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
/* HDMI */
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
dpi_out0: endpoint {
|
|
remote-endpoint = <&tfp410_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&serdes_ln_ctrl {
|
|
idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>,
|
|
<J721S2_SERDES0_LANE2_USB_SWAP>, <J721S2_SERDES0_LANE3_USB>;
|
|
};
|
|
|
|
&serdes_refclk {
|
|
clock-frequency = <100000000>;
|
|
};
|
|
|
|
&serdes0 {
|
|
status = "okay";
|
|
|
|
serdes0_pcie_link: phy@0 {
|
|
reg = <0>;
|
|
cdns,num-lanes = <2>;
|
|
#phy-cells = <0>;
|
|
cdns,phy-type = <PHY_TYPE_PCIE>;
|
|
resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
|
|
};
|
|
|
|
serdes0_usb_link: phy@2 {
|
|
status = "okay";
|
|
reg = <2>;
|
|
cdns,num-lanes = <1>;
|
|
#phy-cells = <0>;
|
|
cdns,phy-type = <PHY_TYPE_USB3>;
|
|
resets = <&serdes_wiz0 3>;
|
|
};
|
|
};
|
|
|
|
&pcie1_rc {
|
|
status = "okay";
|
|
reset-gpios = <&exp1 10 GPIO_ACTIVE_HIGH>;
|
|
phys = <&serdes0_pcie_link>;
|
|
phy-names = "pcie-phy";
|
|
num-lanes = <2>;
|
|
};
|
|
|
|
&usb_serdes_mux {
|
|
idle-states = <0>; /* USB0 to SERDES lane 2 */
|
|
};
|
|
|
|
&usbss0 {
|
|
status = "okay";
|
|
pinctrl-0 = <&main_usbss0_pins_default>;
|
|
pinctrl-names = "default";
|
|
ti,vbus-divider;
|
|
};
|
|
|
|
&usb0 {
|
|
dr_mode = "host";
|
|
maximum-speed = "super-speed";
|
|
phys = <&serdes0_usb_link>;
|
|
phy-names = "cdns3,usb3-phy";
|
|
};
|