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c624d07f3f
The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register, not the mpumodrst. So the bank for these reset bits should be 1, not 0. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> |
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clock_manager.h | ||
dwmmc.h | ||
fpga_manager.h | ||
freeze_controller.h | ||
gpio.h | ||
nic301.h | ||
reset_manager.h | ||
scan_manager.h | ||
scu.h | ||
sdram.h | ||
socfpga_base_addrs.h | ||
system_manager.h | ||
timer.h |