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The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs. As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for DDR, PER, and CORE PLLs. Calculating the required values and setting the registers accordingly was taken from the set_mpu_spreadspectrum routine contained in the arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project. In locked condition, DPLL output clock = CLKINP *[M/N]. In case of SSC enabled, the reference manual explains that there is a restriction of range of M values. Since the clk_ti_am3_dpll_round_rate() attempts to select the minimum possible N, the value of M obtained is not guaranteed to be within the range required. With the new "ti,min-div" parameter it is possible to increase N and consequently M to satisfy the constraint imposed by SSC. Link: https://lore.kernel.org/r/20210606202253.31649-6-dariobin@libero.it Signed-off-by: Dario Binacchi <dariobin@libero.it> |
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.. | ||
cpu | ||
dts | ||
include | ||
lib | ||
mach-aspeed | ||
mach-at91 | ||
mach-bcm283x | ||
mach-bcmstb | ||
mach-cortina | ||
mach-davinci | ||
mach-exynos | ||
mach-highbank | ||
mach-imx | ||
mach-integrator | ||
mach-ipq40xx | ||
mach-k3 | ||
mach-keystone | ||
mach-kirkwood | ||
mach-lpc32xx | ||
mach-mediatek | ||
mach-meson | ||
mach-mvebu | ||
mach-nexell | ||
mach-octeontx | ||
mach-octeontx2 | ||
mach-omap2 | ||
mach-orion5x | ||
mach-owl | ||
mach-qemu | ||
mach-rmobile | ||
mach-rockchip | ||
mach-s5pc1xx | ||
mach-snapdragon | ||
mach-socfpga | ||
mach-sti | ||
mach-stm32 | ||
mach-stm32mp | ||
mach-sunxi | ||
mach-tegra | ||
mach-u8500 | ||
mach-uniphier | ||
mach-versal | ||
mach-versatile | ||
mach-zynq | ||
mach-zynqmp | ||
mach-zynqmp-r5 | ||
thumb1/include/asm/proc-armv | ||
config.mk | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |