mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-14 07:13:03 +00:00
35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
116 lines
2 KiB
C
116 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2019
|
|
* shuyiqi <shuyiqi@phytium.com.cn>
|
|
* liuhao <liuhao@phytium.com.cn>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <command.h>
|
|
#include <cpu_func.h>
|
|
#include <init.h>
|
|
#include <log.h>
|
|
#include <asm/armv8/mmu.h>
|
|
#include <asm/cache.h>
|
|
#include <asm/global_data.h>
|
|
#include <asm/system.h>
|
|
#include <asm/io.h>
|
|
#include <linux/arm-smccc.h>
|
|
#include <linux/kernel.h>
|
|
#include <scsi.h>
|
|
#include "cpu.h"
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
int dram_init(void)
|
|
{
|
|
gd->mem_clk = 0;
|
|
gd->ram_size = PHYS_SDRAM_1_SIZE;
|
|
return 0;
|
|
}
|
|
|
|
int dram_init_banksize(void)
|
|
{
|
|
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
|
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int board_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void reset_cpu(void)
|
|
{
|
|
struct arm_smccc_res res;
|
|
|
|
arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
|
|
debug("reset cpu error, %lx\n", res.a0);
|
|
}
|
|
|
|
static struct mm_region durian_mem_map[] = {
|
|
{
|
|
.virt = 0x0UL,
|
|
.phys = 0x0UL,
|
|
.size = 0x80000000UL,
|
|
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
|
PTE_BLOCK_NON_SHARE |
|
|
PTE_BLOCK_PXN |
|
|
PTE_BLOCK_UXN
|
|
},
|
|
{
|
|
.virt = (u64)PHYS_SDRAM_1,
|
|
.phys = (u64)PHYS_SDRAM_1,
|
|
.size = (u64)PHYS_SDRAM_1_SIZE,
|
|
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
|
PTE_BLOCK_NS |
|
|
PTE_BLOCK_INNER_SHARE
|
|
},
|
|
{
|
|
0,
|
|
}
|
|
};
|
|
|
|
struct mm_region *mem_map = durian_mem_map;
|
|
|
|
int print_cpuinfo(void)
|
|
{
|
|
printf("CPU: Phytium ft2004 %ld MHz\n", gd->cpu_clk);
|
|
return 0;
|
|
}
|
|
|
|
int __asm_flush_l3_dcache(void)
|
|
{
|
|
int i, pstate;
|
|
|
|
for (i = 0; i < HNF_COUNT; i++)
|
|
writeq(HNF_PSTATE_SFONLY, HNF_PSTATE_REQ + i * HNF_STRIDE);
|
|
for (i = 0; i < HNF_COUNT; i++) {
|
|
do {
|
|
pstate = readq(HNF_PSTATE_STAT + i * HNF_STRIDE);
|
|
} while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2));
|
|
}
|
|
|
|
for (i = 0; i < HNF_COUNT; i++)
|
|
writeq(HNF_PSTATE_FULL, HNF_PSTATE_REQ + i * HNF_STRIDE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int last_stage_init(void)
|
|
{
|
|
int ret;
|
|
|
|
/* pci e */
|
|
pci_init();
|
|
/* scsi scan */
|
|
ret = scsi_scan(true);
|
|
if (ret) {
|
|
printf("scsi scan failed\n");
|
|
return CMD_RET_FAILURE;
|
|
}
|
|
return ret;
|
|
}
|
|
|