mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-23 19:43:33 +00:00
71d2a5e5ef
Synchronize R-Car device trees with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .
The following script has been used for the synchronization:
$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
else
echo "NOT FOUND: $i"
fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )
Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.
Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.
Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .
Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .
Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
543 lines
9.9 KiB
Text
543 lines
9.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the R-Car Gen3 ULCB board
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*
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* Copyright (C) 2016 Renesas Electronics Corp.
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* Copyright (C) 2016 Cogent Embedded, Inc.
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*/
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/*
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* SSI-AK4613
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* aplay -D plughw:0,0 xxx.wav
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* arecord -D plughw:0,0 xxx.wav
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* SSI-HDMI
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* aplay -D plughw:0,1 xxx.wav
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Renesas R-Car Gen3 ULCB board";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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i2c7 = &i2c_dvfs;
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serial0 = &scif2;
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ethernet0 = &avb;
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mmc0 = &sdhi2;
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mmc1 = &sdhi0;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
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stdout-path = "serial0:115200n8";
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};
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audio_clkout: audio-clkout {
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/*
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* This is same as <&rcar_sound 0>
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* but needed to avoid cs2000/rcar_sound probe dead-lock
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*/
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12288000>;
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};
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hdmi0-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi0_con: endpoint {
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remote-endpoint = <&rcar_dw_hdmi0_out>;
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};
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};
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};
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keyboard {
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compatible = "gpio-keys";
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key-1 {
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linux,code = <KEY_1>;
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label = "SW3";
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led5 {
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gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
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};
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led6 {
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gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
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};
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sound_card: sound {
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compatible = "audio-graph-card2";
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label = "rcar-sound";
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links = <&rsnd_port0 /* ak4613 */
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&rsnd_port1 /* HDMI0 */
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>;
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1>, <1800000 0>;
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};
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x12_clk: x12 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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x23_clk: x23-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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};
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&a57_0 {
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cpu-supply = <&dvfs>;
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};
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&audio_clk_a {
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clock-frequency = <22579200>;
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};
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&avb {
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy0>;
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tx-internal-delay-ps = <2000>;
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status = "okay";
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phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-id0022.1622",
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"ethernet-phy-ieee802.3-c22";
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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};
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};
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&du {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&extal_clk {
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clock-frequency = <16666666>;
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};
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&extalr_clk {
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clock-frequency = <32768>;
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};
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&hdmi0 {
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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rcar_dw_hdmi0_out: endpoint {
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remote-endpoint = <&hdmi0_con>;
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};
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};
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port@2 {
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reg = <2>;
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dw_hdmi0_snd_in: endpoint {
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remote-endpoint = <&rsnd_for_hdmi>;
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};
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};
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};
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <100000>;
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ak4613: codec@10 {
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compatible = "asahi-kasei,ak4613";
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#sound-dai-cells = <0>;
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reg = <0x10>;
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clocks = <&rcar_sound 3>;
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asahi-kasei,in1-single-end;
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asahi-kasei,in2-single-end;
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asahi-kasei,out1-single-end;
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asahi-kasei,out2-single-end;
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asahi-kasei,out3-single-end;
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asahi-kasei,out4-single-end;
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asahi-kasei,out5-single-end;
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asahi-kasei,out6-single-end;
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port {
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ak4613_endpoint: endpoint {
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remote-endpoint = <&rsnd_for_ak4613>;
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};
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};
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};
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cs2000: clk-multiplier@4f {
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#clock-cells = <0>;
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compatible = "cirrus,cs2000-cp";
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reg = <0x4f>;
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clocks = <&audio_clkout>, <&x12_clk>;
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clock-names = "clk_in", "ref_clk";
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assigned-clocks = <&cs2000>;
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assigned-clock-rates = <24576000>; /* 1/1 divide */
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};
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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versaclock5: clock-generator@6a {
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compatible = "idt,5p49v5925";
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reg = <0x6a>;
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#clock-cells = <1>;
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clocks = <&x23_clk>;
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clock-names = "xin";
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};
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};
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&i2c_dvfs {
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status = "okay";
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clock-frequency = <400000>;
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pmic: pmic@30 {
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pinctrl-0 = <&irq0_pins>;
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pinctrl-names = "default";
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compatible = "rohm,bd9571mwv";
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reg = <0x30>;
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interrupt-parent = <&intc_ex>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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rohm,ddr-backup-power = <0xf>;
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rohm,rstbmode-pulse;
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regulators {
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dvfs: dvfs {
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regulator-name = "dvfs";
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1030000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&ohci1 {
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status = "okay";
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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avb_pins: avb {
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mux {
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groups = "avb_link", "avb_mdio", "avb_mii";
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function = "avb";
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};
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pins_mdio {
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groups = "avb_mdio";
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drive-strength = <24>;
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};
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pins_mii_tx {
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pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
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"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
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drive-strength = <12>;
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};
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};
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i2c2_pins: i2c2 {
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groups = "i2c2_a";
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function = "i2c2";
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};
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irq0_pins: irq0 {
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groups = "intc_ex_irq0";
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function = "intc_ex";
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};
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scif2_pins: scif2 {
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groups = "scif2_data_a";
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function = "scif2";
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};
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scif_clk_pins: scif_clk {
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groups = "scif_clk_a";
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function = "scif_clk";
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};
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <3300>;
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};
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sdhi0_pins_uhs: sd0_uhs {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <1800>;
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};
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sdhi2_pins: sd2 {
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groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
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function = "sdhi2";
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power-source = <1800>;
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};
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sound_pins: sound {
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groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
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function = "ssi";
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};
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sound_clk_pins: sound-clk {
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groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
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"audio_clkout_a", "audio_clkout3_a";
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function = "audio_clk";
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};
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usb1_pins: usb1 {
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groups = "usb1";
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function = "usb1";
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};
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};
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&rcar_sound {
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pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
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pinctrl-names = "default";
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/* Single DAI */
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#sound-dai-cells = <0>;
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/* audio_clkout0/1/2/3 */
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#clock-cells = <1>;
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clock-frequency = <12288000 11289600>;
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status = "okay";
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/* update <audio_clk_b> to <cs2000> */
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clocks = <&cpg CPG_MOD 1005>,
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<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
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<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
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<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
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<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
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<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
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<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
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<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
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<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
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<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
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<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
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<&audio_clk_a>, <&cs2000>,
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<&audio_clk_c>,
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<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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rsnd_port0: port@0 {
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reg = <0>;
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rsnd_for_ak4613: endpoint {
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remote-endpoint = <&ak4613_endpoint>;
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bitclock-master;
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frame-master;
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playback = <&ssi0>, <&src0>, <&dvc0>;
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capture = <&ssi1>, <&src1>, <&dvc1>;
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};
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};
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rsnd_port1: port@1 {
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reg = <1>;
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rsnd_for_hdmi: endpoint {
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remote-endpoint = <&dw_hdmi0_snd_in>;
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bitclock-master;
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frame-master;
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playback = <&ssi2>;
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};
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};
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};
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};
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&rpc {
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/* Left disabled. To be enabled by firmware when unlocked. */
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flash@0 {
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compatible = "cypress,hyperflash", "cfi-flash";
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reg = <0>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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bootparam@0 {
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reg = <0x00000000 0x040000>;
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read-only;
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};
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bl2@40000 {
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reg = <0x00040000 0x140000>;
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read-only;
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};
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cert_header_sa6@180000 {
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reg = <0x00180000 0x040000>;
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read-only;
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};
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bl31@1c0000 {
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reg = <0x001c0000 0x040000>;
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read-only;
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};
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tee@200000 {
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reg = <0x00200000 0x440000>;
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read-only;
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};
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uboot@640000 {
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reg = <0x00640000 0x100000>;
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read-only;
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};
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dtb@740000 {
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reg = <0x00740000 0x080000>;
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};
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kernel@7c0000 {
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reg = <0x007c0000 0x1400000>;
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};
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user@1bc0000 {
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reg = <0x01bc0000 0x2440000>;
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};
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};
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};
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};
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&rwdt {
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timeout-sec = <60>;
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status = "okay";
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};
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&scif2 {
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pinctrl-0 = <&scif2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <14745600>;
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-1 = <&sdhi0_pins_uhs>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <&vcc_sdhi0>;
|
|
vqmmc-supply = <&vccq_sdhi0>;
|
|
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
|
|
bus-width = <4>;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhi2 {
|
|
/* used for on-board 8bit eMMC */
|
|
pinctrl-0 = <&sdhi2_pins>;
|
|
pinctrl-1 = <&sdhi2_pins>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <®_1p8v>;
|
|
bus-width = <8>;
|
|
mmc-hs200-1_8v;
|
|
mmc-hs400-1_8v;
|
|
no-sd;
|
|
no-sdio;
|
|
non-removable;
|
|
full-pwr-cycle-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
shared-pin;
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
pinctrl-0 = <&usb1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|