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The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.
In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.
Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.
References: commit
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.. | ||
aspeed | ||
at91 | ||
exynos | ||
renesas | ||
rockchip | ||
tegra | ||
uniphier | ||
clk-hsdk-cgu.c | ||
clk-uclass.c | ||
clk_bcm6345.c | ||
clk_boston.c | ||
clk_fixed_rate.c | ||
clk_pic32.c | ||
clk_sandbox.c | ||
clk_sandbox_test.c | ||
clk_stm32f.c | ||
clk_stm32h7.c | ||
clk_zynq.c | ||
clk_zynqmp.c | ||
Kconfig | ||
Makefile |