mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 17:07:38 +00:00
35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
55 lines
972 B
C
55 lines
972 B
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2017 Renesas Electronics
|
|
* Copyright (C) Chris Brandt
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <cpu_func.h>
|
|
#include <init.h>
|
|
#include <asm/global_data.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/sys_proto.h>
|
|
|
|
#define RZA1_WDT_BASE 0xfcfe0000
|
|
#define WTCSR 0x00
|
|
#define WTCNT 0x02
|
|
#define WRCSR 0x04
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
int board_init(void)
|
|
{
|
|
gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int dram_init(void)
|
|
{
|
|
if (fdtdec_setup_mem_size_base() != 0)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int dram_init_banksize(void)
|
|
{
|
|
fdtdec_setup_memory_banksize();
|
|
|
|
return 0;
|
|
}
|
|
|
|
void reset_cpu(void)
|
|
{
|
|
/* Dummy read (must read WRCSR:WOVF at least once before clearing) */
|
|
readb(RZA1_WDT_BASE + WRCSR);
|
|
|
|
writew(0xa500, RZA1_WDT_BASE + WRCSR);
|
|
writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
|
|
writew(0x5a00, RZA1_WDT_BASE + WTCNT);
|
|
writew(0xa578, RZA1_WDT_BASE + WTCSR);
|
|
|
|
for (;;)
|
|
asm volatile("wfi");
|
|
}
|