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Pin mux logic has 2 options in priority order, one is through RCW_SRC and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic takes the priority for SPI pads and do not allow RCW_BASE and SPI_EXT to control the SPI muxing. But actually those are DSPI controller's pads instead of QSPI controller's, so this workaround allows RCW fields SPI_BASE and SPI_EXT to control relevant pads muxing. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com> |
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.. | ||
doc | ||
cpu.c | ||
cpu.h | ||
fdt.c | ||
fsl_lsch2_serdes.c | ||
fsl_lsch2_speed.c | ||
fsl_lsch3_serdes.c | ||
fsl_lsch3_speed.c | ||
Kconfig | ||
lowlevel.S | ||
ls1012a_serdes.c | ||
ls1043a_serdes.c | ||
ls1046a_serdes.c | ||
ls2080a_serdes.c | ||
Makefile | ||
mp.c | ||
ppa.c | ||
soc.c | ||
spl.c |