Aneesh Bansal 3a4800a596 drivers/crypto/fsl: fix endianness issue in RNG ... For Setting and clearing the bits in SEC Block registers sec_clrbits32() and sec_setbits32() are used which work as per endianness of CAAM block. So these must be used with SEC register address as argument. If the value is read in a local variable, then the functions will not behave correctly where endianness of CAAM and core is different. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> CC: Alex Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>		2015-12-15 08:57:35 +08:00
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fsl	drivers/crypto/fsl: fix endianness issue in RNG	2015-12-15 08:57:35 +08:00
rsa_mod_exp	rsa : Compile Modular Exponentiation files based on CONFIG_RSA_SOFTWARE_EXP	2015-03-05 12:04:59 -08:00
ace_sha.c	includes: move openssl headers to include/u-boot	2014-06-19 11:19:04 -04:00
ace_sha.h	drivers: crypto: ace_sha: add implementation of hardware based lib rand	2014-03-28 15:06:31 -04:00
Kconfig	drivers: hierarchize drivers Kconfig menu	2015-08-12 20:47:44 -04:00
Makefile	DM: crypto/rsa_mod_exp: Add rsa Modular Exponentiation DM driver	2015-01-29 17:09:58 -07:00