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8e81e679db
Update the DDR init flow for multi-setpoint support on i.MX93. A new fsp_cfg struct need to be added in the timing file to store the diff part of the DDRC and DRAM MR register for each setpoint. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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clock.h | ||
clock_imx8mm.h | ||
clock_imx8mq.h | ||
crm_regs.h | ||
ddr.h | ||
gpio.h | ||
imx-regs.h | ||
imx8mm_pins.h | ||
imx8mn_pins.h | ||
imx8mp_pins.h | ||
imx8mq_pins.h | ||
lpddr4_define.h | ||
sys_proto.h |