mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 10:30:32 +00:00
8c103c33fb
Now that Linux has accepted these tags, move the device tree files in U-Boot over to use them. Signed-off-by: Simon Glass <sjg@chromium.org>
634 lines
16 KiB
Text
634 lines
16 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
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*/
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#include <dt-bindings/clock/k210-sysctl.h>
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#include <dt-bindings/mfd/k210-sysctl.h>
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#include <dt-bindings/pinctrl/k210-pinctrl.h>
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#include <dt-bindings/reset/k210-sysctl.h>
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/ {
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/*
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* Although the K210 is a 64-bit CPU, the address bus is only 32-bits
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* wide, and the upper half of all addresses is ignored.
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*/
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "canaan,kendryte-k210";
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aliases {
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cpu0 = &cpu0;
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cpu1 = &cpu1;
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dma0 = &dmac0;
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gpio0 = &gpio0;
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gpio1 = &gpio1_0;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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pinctrl0 = &fpioa;
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serial0 = &uarths0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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spi0 = &spi0;
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spi1 = &spi1;
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spi2 = &spi2;
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spi3 = &spi3;
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timer0 = &timer0;
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timer1 = &timer1;
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timer2 = &timer2;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <7800000>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "canaan,k210", "sifive,rocket0", "riscv";
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reg = <0>;
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riscv,isa = "rv64imafdgc";
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mmu-type = "sv39";
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i-cache-block-size = <64>;
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i-cache-size = <0x8000>;
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d-cache-block-size = <64>;
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d-cache-size = <0x8000>;
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clocks = <&sysclk K210_CLK_CPU>;
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cpu0_intc: interrupt-controller {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "riscv,cpu-intc";
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};
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "canaan,k210", "sifive,rocket0", "riscv";
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reg = <1>;
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riscv,isa = "rv64imafdgc";
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mmu-type = "sv39";
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i-cache-block-size = <64>;
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i-cache-size = <0x8000>;
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d-cache-block-size = <64>;
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d-cache-size = <0x8000>;
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clocks = <&sysclk K210_CLK_CPU>;
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cpu1_intc: interrupt-controller {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "riscv,cpu-intc";
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};
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};
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};
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sram: memory@80000000 {
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device_type = "memory";
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compatible = "canaan,k210-sram";
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reg = <0x80000000 0x400000>,
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<0x80400000 0x200000>,
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<0x80600000 0x200000>;
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reg-names = "sram0", "sram1", "aisram";
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clocks = <&sysclk K210_CLK_SRAM0>,
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<&sysclk K210_CLK_SRAM1>,
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<&sysclk K210_CLK_AI>;
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clock-names = "sram0", "sram1", "aisram";
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bootph-all;
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};
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clocks {
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in0: osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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bootph-all;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "canaan,k210-soc", "simple-bus";
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ranges;
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interrupt-parent = <&plic0>;
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debug0: debug@0 {
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compatible = "canaan,k210-debug", "riscv,debug";
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reg = <0x0 0x1000>;
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};
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rom0: nvmem@1000 {
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reg = <0x1000 0x1000>;
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read-only;
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};
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clint0: clint@2000000 {
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#interrupt-cells = <1>;
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compatible = "canaan,k210-clint", "sifive,clint0", "riscv,clint0";
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reg = <0x2000000 0xC000>;
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interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
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<&cpu1_intc 3>, <&cpu1_intc 7>;
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clocks = <&sysclk K210_CLK_CLINT>;
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};
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plic0: interrupt-controller@C000000 {
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#interrupt-cells = <1>;
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compatible = "canaan,k210-plic", "sifive,plic-1.0.0", "riscv,plic0";
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reg = <0xC000000 0x4000000>;
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interrupt-controller;
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interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
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<&cpu1_intc 11>, <&cpu1_intc 9>;
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riscv,ndev = <65>;
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riscv,max-priority = <7>;
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};
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uarths0: serial@38000000 {
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compatible = "canaan,k210-uarths", "sifive,uart0";
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reg = <0x38000000 0x1000>;
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interrupts = <33>;
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clocks = <&sysclk K210_CLK_CPU>;
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status = "disabled";
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};
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gpio0: gpio-controller@38001000 {
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#interrupt-cells = <2>;
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#gpio-cells = <2>;
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compatible = "canaan,k210-gpiohs", "sifive,gpio0";
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reg = <0x38001000 0x1000>;
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interrupt-controller;
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interrupts = <34 35 36 37 38 39 40 41
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42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57
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58 59 60 61 62 63 64 65>;
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gpio-controller;
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ngpios = <32>;
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status = "disabled";
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};
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kpu0: kpu@40800000 {
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compatible = "canaan,k210-kpu";
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reg = <0x40800000 0xc00000>;
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interrupts = <25>;
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clocks = <&sysclk K210_CLK_AI>;
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status = "disabled";
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};
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fft0: fft@42000000 {
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compatible = "canaan,k210-fft";
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reg = <0x42000000 0x400000>;
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interrupts = <26>;
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clocks = <&sysclk K210_CLK_FFT>;
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resets = <&sysrst K210_RST_FFT>;
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status = "disabled";
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};
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dmac0: dma-controller@50000000 {
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compatible = "canaan,k210-dmac", "snps,axi-dma-1.01a";
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reg = <0x50000000 0x1000>;
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interrupts = <27 28 29 30 31 32>;
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clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
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clock-names = "core-clk", "cfgr-clk";
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resets = <&sysrst K210_RST_DMA>;
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dma-channels = <6>;
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snps,dma-masters = <2>;
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snps,data-width = <5>;
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snps,block-size = <0x200000 0x200000 0x200000
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0x200000 0x200000 0x200000>;
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snps,axi-max-burst-len = <256>;
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status = "disabled";
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};
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apb0: bus@50200000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "canaan,k210-apb", "simple-pm-bus";
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ranges;
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clocks = <&sysclk K210_CLK_APB0>;
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gpio1: gpio-controller@50200000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "canaan,k210-gpio",
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"snps,dw-apb-gpio";
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reg = <0x50200000 0x80>;
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clocks = <&sysclk K210_CLK_APB0>,
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<&sysclk K210_CLK_GPIO>;
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clock-names = "bus", "db";
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resets = <&sysrst K210_RST_GPIO>;
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status = "disabled";
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gpio1_0: gpio1@0 {
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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compatible = "snps,dw-apb-gpio-port";
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reg = <0>;
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interrupt-controller;
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interrupts = <23>;
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gpio-controller;
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snps,nr-gpios = <8>;
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};
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};
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uart1: serial@50210000 {
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compatible = "canaan,k210-uart",
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"snps,dw-apb-uart";
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reg = <0x50210000 0x100>;
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interrupts = <11>;
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clocks = <&sysclk K210_CLK_UART1>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "baudclk", "apb_pclk";
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resets = <&sysrst K210_RST_UART1>;
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reg-io-width = <4>;
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reg-shift = <2>;
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dcd-override;
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dsr-override;
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cts-override;
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ri-override;
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status = "disabled";
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};
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uart2: serial@50220000 {
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compatible = "canaan,k210-uart",
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"snps,dw-apb-uart";
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reg = <0x50220000 0x100>;
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interrupts = <12>;
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clocks = <&sysclk K210_CLK_UART2>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "baudclk", "apb_pclk";
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resets = <&sysrst K210_RST_UART2>;
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reg-io-width = <4>;
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reg-shift = <2>;
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dcd-override;
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dsr-override;
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cts-override;
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ri-override;
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status = "disabled";
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};
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uart3: serial@50230000 {
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compatible = "canaan,k210-uart",
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"snps,dw-apb-uart";
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reg = <0x50230000 0x100>;
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interrupts = <13>;
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clocks = <&sysclk K210_CLK_UART3>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "baudclk", "apb_pclk";
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resets = <&sysrst K210_RST_UART3>;
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reg-io-width = <4>;
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reg-shift = <2>;
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dcd-override;
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dsr-override;
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cts-override;
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ri-override;
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status = "disabled";
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};
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spi2: spi@50240000 {
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compatible = "canaan,k210-spi",
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"snps,dw-apb-ssi-4.01",
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"snps,dw-apb-ssi";
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spi-slave;
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reg = <0x50240000 0x100>;
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interrupts = <2>;
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clocks = <&sysclk K210_CLK_SPI2>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "ssi_clk", "pclk";
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resets = <&sysrst K210_RST_SPI2>;
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spi-max-frequency = <25000000>;
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status = "disabled";
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};
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i2s0: i2s@50250000 {
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compatible = "canaan,k210-i2s",
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"snps,designware-i2s";
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reg = <0x50250000 0x200>;
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interrupts = <5>;
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clocks = <&sysclk K210_CLK_I2S0>;
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clock-names = "i2sclk";
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resets = <&sysrst K210_RST_I2S0>;
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status = "disabled";
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};
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apu0: sound@520250200 {
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compatible = "canaan,k210-apu";
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reg = <0x50250200 0x200>;
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status = "disabled";
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};
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i2s1: i2s@50260000 {
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compatible = "canaan,k210-i2s",
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"snps,designware-i2s";
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reg = <0x50260000 0x200>;
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interrupts = <6>;
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clocks = <&sysclk K210_CLK_I2S1>;
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clock-names = "i2sclk";
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resets = <&sysrst K210_RST_I2S1>;
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status = "disabled";
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};
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i2s2: i2s@50270000 {
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compatible = "canaan,k210-i2s",
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"snps,designware-i2s";
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reg = <0x50270000 0x200>;
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interrupts = <7>;
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clocks = <&sysclk K210_CLK_I2S2>;
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clock-names = "i2sclk";
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resets = <&sysrst K210_RST_I2S2>;
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status = "disabled";
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};
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i2c0: i2c@50280000 {
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compatible = "canaan,k210-i2c",
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"snps,designware-i2c";
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reg = <0x50280000 0x100>;
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interrupts = <8>;
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clocks = <&sysclk K210_CLK_I2C0>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "ref", "pclk";
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resets = <&sysrst K210_RST_I2C0>;
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status = "disabled";
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};
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i2c1: i2c@50290000 {
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compatible = "canaan,k210-i2c",
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"snps,designware-i2c";
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reg = <0x50290000 0x100>;
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interrupts = <9>;
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clocks = <&sysclk K210_CLK_I2C1>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "ref", "pclk";
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resets = <&sysrst K210_RST_I2C1>;
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status = "disabled";
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};
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i2c2: i2c@502A0000 {
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compatible = "canaan,k210-i2c",
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"snps,designware-i2c";
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reg = <0x502A0000 0x100>;
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interrupts = <10>;
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clocks = <&sysclk K210_CLK_I2C2>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "ref", "pclk";
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resets = <&sysrst K210_RST_I2C2>;
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status = "disabled";
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};
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fpioa: pinmux@502B0000 {
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compatible = "canaan,k210-fpioa";
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reg = <0x502B0000 0x100>;
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clocks = <&sysclk K210_CLK_FPIOA>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "ref", "pclk";
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resets = <&sysrst K210_RST_FPIOA>;
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canaan,k210-sysctl-power = <&sysctl K210_SYSCTL_POWER_SEL>;
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pinctrl-0 = <&fpioa_jtag>;
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pinctrl-names = "default";
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status = "disabled";
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fpioa_jtag: jtag {
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pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
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<K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
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<K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
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<K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
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};
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};
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sha256: sha256@502C0000 {
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compatible = "canaan,k210-sha256";
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reg = <0x502C0000 0x100>;
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clocks = <&sysclk K210_CLK_SHA>;
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resets = <&sysrst K210_RST_SHA>;
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status = "disabled";
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};
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timer0: timer@502D0000 {
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compatible = "canaan,k210-timer",
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"snps,dw-apb-timer";
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reg = <0x502D0000 0x100>;
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interrupts = <14 15>;
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clocks = <&sysclk K210_CLK_TIMER0>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "timer", "pclk";
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resets = <&sysrst K210_RST_TIMER0>;
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status = "disabled";
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};
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timer1: timer@502E0000 {
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compatible = "canaan,k210-timer",
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"snps,dw-apb-timer";
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reg = <0x502E0000 0x100>;
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interrupts = <16 17>;
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clocks = <&sysclk K210_CLK_TIMER1>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "timer", "pclk";
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resets = <&sysrst K210_RST_TIMER1>;
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status = "disabled";
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};
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timer2: timer@502F0000 {
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compatible = "canaan,k210-timer",
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"snps,dw-apb-timer";
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reg = <0x502F0000 0x100>;
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interrupts = <18 19>;
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clocks = <&sysclk K210_CLK_TIMER2>,
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<&sysclk K210_CLK_APB0>;
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clock-names = "timer", "pclk";
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resets = <&sysrst K210_RST_TIMER2>;
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status = "disabled";
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};
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};
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apb1: bus@50400000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "canaan,k210-apb", "simple-pm-bus";
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ranges;
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clocks = <&sysclk K210_CLK_APB1>;
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wdt0: watchdog@50400000 {
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compatible = "canaan,k210-wdt", "snps,dw-wdt";
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reg = <0x50400000 0x100>;
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interrupts = <21>;
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clocks = <&sysclk K210_CLK_WDT0>,
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<&sysclk K210_CLK_APB1>;
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clock-names = "tclk", "pclk";
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resets = <&sysrst K210_RST_WDT0>;
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};
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wdt1: watchdog@50410000 {
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compatible = "canaan,k210-wdt", "snps,dw-wdt";
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reg = <0x50410000 0x100>;
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interrupts = <22>;
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clocks = <&sysclk K210_CLK_WDT1>,
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<&sysclk K210_CLK_APB1>;
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clock-names = "tclk", "pclk";
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resets = <&sysrst K210_RST_WDT1>;
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status = "disabled";
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};
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otp0: nvmem@50420000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "canaan,k210-otp";
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reg = <0x50420000 0x100>,
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<0x88000000 0x20000>;
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reg-names = "reg", "mem";
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clocks = <&sysclk K210_CLK_ROM>;
|
|
resets = <&sysrst K210_RST_ROM>;
|
|
read-only;
|
|
status = "disabled";
|
|
|
|
/* Bootloader */
|
|
firmware@00000 {
|
|
reg = <0x00000 0xC200>;
|
|
};
|
|
|
|
/*
|
|
* config string as described in RISC-V
|
|
* privileged spec 1.9
|
|
*/
|
|
config-1-9@1c000 {
|
|
reg = <0x1C000 0x1000>;
|
|
};
|
|
|
|
/*
|
|
* Device tree containing only registers,
|
|
* interrupts, and cpus
|
|
*/
|
|
fdt@1d000 {
|
|
reg = <0x1D000 0x2000>;
|
|
};
|
|
|
|
/* CPU/ROM credits */
|
|
credits@1f000 {
|
|
reg = <0x1F000 0x1000>;
|
|
};
|
|
};
|
|
|
|
dvp0: camera@50430000 {
|
|
compatible = "canaan,k210-dvp";
|
|
reg = <0x50430000 0x100>;
|
|
interrupts = <24>;
|
|
clocks = <&sysclk K210_CLK_DVP>;
|
|
resets = <&sysrst K210_RST_DVP>;
|
|
canaan,k210-sysctl = <&sysctl>;
|
|
canaan,k210-misc-offset = <K210_SYSCTL_MISC>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sysctl: syscon@50440000 {
|
|
compatible = "canaan,k210-sysctl",
|
|
"syscon", "simple-mfd";
|
|
reg = <0x50440000 0x100>;
|
|
clocks = <&sysclk K210_CLK_APB1>;
|
|
clock-names = "pclk";
|
|
reg-io-width = <4>;
|
|
bootph-all;
|
|
|
|
sysclk: clock-controller {
|
|
#clock-cells = <1>;
|
|
compatible = "canaan,k210-clk";
|
|
clocks = <&in0>;
|
|
assigned-clocks = <&sysclk K210_CLK_PLL1>;
|
|
assigned-clock-rates = <390000000>;
|
|
bootph-all;
|
|
};
|
|
|
|
sysrst: reset-controller {
|
|
compatible = "canaan,k210-rst",
|
|
"syscon-reset";
|
|
#reset-cells = <1>;
|
|
regmap = <&sysctl>;
|
|
offset = <K210_SYSCTL_PERI_RESET>;
|
|
mask = <0x27FFFFFF>;
|
|
assert-high = <1>;
|
|
};
|
|
|
|
reboot {
|
|
compatible = "syscon-reboot";
|
|
regmap = <&sysctl>;
|
|
offset = <K210_SYSCTL_SOFT_RESET>;
|
|
mask = <1>;
|
|
value = <1>;
|
|
};
|
|
};
|
|
|
|
aes0: aes@50450000 {
|
|
compatible = "canaan,k210-aes";
|
|
reg = <0x50450000 0x100>;
|
|
clocks = <&sysclk K210_CLK_AES>;
|
|
resets = <&sysrst K210_RST_AES>;
|
|
status = "disabled";
|
|
};
|
|
|
|
rtc: rtc@50460000 {
|
|
compatible = "canaan,k210-rtc";
|
|
reg = <0x50460000 0x100>;
|
|
clocks = <&in0>;
|
|
resets = <&sysrst K210_RST_RTC>;
|
|
interrupts = <20>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
apb2: bus@52000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "canaan,k210-apb", "simple-pm-bus";
|
|
ranges;
|
|
clocks = <&sysclk K210_CLK_APB2>;
|
|
|
|
spi0: spi@52000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "canaan,k210-spi",
|
|
"snps,dw-apb-ssi-4.01",
|
|
"snps,dw-apb-ssi";
|
|
reg = <0x52000000 0x100>;
|
|
interrupts = <1>;
|
|
clocks = <&sysclk K210_CLK_SPI0>,
|
|
<&sysclk K210_CLK_APB2>;
|
|
clock-names = "ssi_clk", "pclk";
|
|
resets = <&sysrst K210_RST_SPI0>;
|
|
spi-max-frequency = <25000000>;
|
|
num-cs = <4>;
|
|
reg-io-width = <4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi1: spi@53000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "canaan,k210-spi",
|
|
"snps,dw-apb-ssi-4.01",
|
|
"snps,dw-apb-ssi";
|
|
reg = <0x53000000 0x100>;
|
|
interrupts = <2>;
|
|
clocks = <&sysclk K210_CLK_SPI1>,
|
|
<&sysclk K210_CLK_APB2>;
|
|
clock-names = "ssi_clk", "pclk";
|
|
resets = <&sysrst K210_RST_SPI1>;
|
|
spi-max-frequency = <25000000>;
|
|
num-cs = <4>;
|
|
reg-io-width = <4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi3: spi@54000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "canaan,k210-ssi",
|
|
"snps,dwc-ssi-1.01a";
|
|
reg = <0x54000000 0x200>;
|
|
interrupts = <4>;
|
|
clocks = <&sysclk K210_CLK_SPI3>,
|
|
<&sysclk K210_CLK_APB2>;
|
|
clock-names = "ssi_clk", "pclk";
|
|
resets = <&sysrst K210_RST_SPI3>;
|
|
/* Could possibly go up to 200 MHz */
|
|
spi-max-frequency = <100000000>;
|
|
num-cs = <4>;
|
|
reg-io-width = <4>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
};
|