u-boot/arch/arm/include/asm/imx-common/mxc_i2c.h
Peng Fan e1bed80272 dm: i2c: mxc_i2c: implement i2c_idle_bus
Implement i2c_idle_bus in driver, then setup_i2c can
be dropped for boards which enable DM_I2C/DM_GPIO/PINCTRL.
The i2c_idle_bus force bus idle flow follows setup_i2c in
arch/arm/imx-common/i2c-mxv7.c

This patch is an implementation following linux kernel patch:
"
commit 1c4b6c3bcf30d0804db0d0647d8ebeb862c6f7e5
Author: Gao Pan <b54642@freescale.com>
Date:   Fri Oct 23 20:28:54 2015 +0800

    i2c: imx: implement bus recovery

    Implement bus recovery methods for i2c-imx so we can recover from
    situations where SCL/SDA are stuck low.

    Once i2c bus SCL/SDA are stuck low during transfer, config the i2c
    pinctrl to gpio mode by calling pinctrl sleep set function, and then
    use GPIO to emulate the i2c protocol to send nine dummy clock to recover
    i2c device. After recovery, set i2c pinctrl to default group setting.
"

See Documentation/devicetree/bindings/i2c/i2c-imx.txt for detailed
description.
1. Introuduce scl_gpio/sda_gpio/bus in mxc_i2c_bus.
2. Discard the __weak attribute for i2c_idle_bus and implement it,
   since we have pinctrl driver/driver model gpio driver. We can
   use device tree, but not let board code to do this.
3. gpio state for mxc_i2c is not a must, but it is recommended. If
   there is no gpio state, driver will give tips, but not fail.
4. The i2c controller was first probed, default pinctrl state will
   be used, so when need to use gpio function, need to do
   "pinctrl_select_state(dev, "gpio")" and after force bus idle,
   need to switch back "pinctrl_select_state(dev, "default")".

This is example about how to use the gpio force bus
idle function:
"
 &i2c1 {
 	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
 	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_gpio>;
	scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
	sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
	status = "okay";
	[....]
 };

[.....]

	pinctrl_i2c1_gpio: i2c1grp_gpio {
		fsl,pins = <
			MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0
			MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0
		>;
	};
"

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
2016-03-28 09:22:58 +02:00

101 lines
2.7 KiB
C

/*
* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARCH_MXC_MXC_I2C_H__
#define __ASM_ARCH_MXC_MXC_I2C_H__
#include <asm-generic/gpio.h>
#include <asm/imx-common/iomux-v3.h>
struct i2c_pin_ctrl {
iomux_v3_cfg_t i2c_mode;
iomux_v3_cfg_t gpio_mode;
unsigned char gp;
unsigned char spare;
};
struct i2c_pads_info {
struct i2c_pin_ctrl scl;
struct i2c_pin_ctrl sda;
};
/*
* Information about i2c controller
* struct mxc_i2c_bus - information about the i2c[x] bus
* @index: i2c bus index
* @base: Address of I2C bus controller
* @driver_data: Flags for different platforms, such as I2C_QUIRK_FLAG.
* @speed: Speed of I2C bus
* @pads_info: pinctrl info for this i2c bus, will be used when pinctrl is ok.
* The following two is only to be compatible with non-DM part.
* @idle_bus_fn: function to force bus idle
* @idle_bus_data: parameter for idle_bus_fun
* For DM:
* bus: The device structure for i2c bus controller
* scl-gpio: specify the gpio related to SCL pin
* sda-gpio: specify the gpio related to SDA pin
*/
struct mxc_i2c_bus {
/*
* board file can use this index to locate which i2c_pads_info is for
* i2c_idle_bus. When pinmux is implement, this entry can be
* discarded. Here we do not use dev->seq, because we do not want to
* export device to board file.
*/
int index;
ulong base;
ulong driver_data;
int speed;
struct i2c_pads_info *pads_info;
#ifndef CONFIG_DM_I2C
int (*idle_bus_fn)(void *p);
void *idle_bus_data;
#else
struct udevice *bus;
/* Use gpio to force bus idle when bus state is abnormal */
struct gpio_desc scl_gpio;
struct gpio_desc sda_gpio;
#endif
};
#if defined(CONFIG_MX6QDL)
#define I2C_PADS(name, scl_i2c, scl_gpio, scl_gp, sda_i2c, sda_gpio, sda_gp) \
struct i2c_pads_info mx6q_##name = { \
.scl = { \
.i2c_mode = MX6Q_##scl_i2c, \
.gpio_mode = MX6Q_##scl_gpio, \
.gp = scl_gp, \
}, \
.sda = { \
.i2c_mode = MX6Q_##sda_i2c, \
.gpio_mode = MX6Q_##sda_gpio, \
.gp = sda_gp, \
} \
}; \
struct i2c_pads_info mx6s_##name = { \
.scl = { \
.i2c_mode = MX6DL_##scl_i2c, \
.gpio_mode = MX6DL_##scl_gpio, \
.gp = scl_gp, \
}, \
.sda = { \
.i2c_mode = MX6DL_##sda_i2c, \
.gpio_mode = MX6DL_##sda_gpio, \
.gp = sda_gp, \
} \
};
#define I2C_PADS_INFO(name) \
(is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) ? \
&mx6q_##name : &mx6s_##name
#endif
int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
struct i2c_pads_info *p);
void bus_i2c_init(int index, int speed, int slave_addr,
int (*idle_bus_fn)(void *p), void *p);
int force_idle_bus(void *priv);
int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus);
#endif