u-boot/arch/arm/dts/fsl-ls1046a-qds.dtsi
Shaohui Xie fdc2b54cb8 armv8: ls1046aqds: add lpuart support
LPUART0 is used by default, and it's using platform clock.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-21 09:20:32 -08:00

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1.3 KiB
Text

/*
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright (C) 2016, Freescale Semiconductor
*
* Mingkai Hu <Mingkai.hu@nxp.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/include/ "fsl-ls1046a.dtsi"
/ {
model = "LS1046A QDS Board";
aliases {
spi0 = &qspi;
spi1 = &dspi0;
};
};
&dspi0 {
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <1000000>; /* input clock */
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3500000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3500000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&lpuart0 {
status = "okay";
};