Simon Glass 06d336cca2 x86: Create a common header for Intel register access ... There are several blocks of registers that are accessed from all over the code on Intel CPUs. These don't currently have their own driver and it is not clear whether having a driver makes sense. An example is the Memory Controller Hub (MCH). We map it to a known location on some Intel chips (mostly those without FSP - Firmware Support Package). Add a new header file for these registers, and move MCH into it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2016-03-17 10:27:24 +08:00
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bd82x6x.c	x86: ivybridge: bd82x6x: Support FSP enabled configuration	2016-02-21 13:42:52 +08:00
cpu.c	x86: Create a common header for Intel register access	2016-03-17 10:27:24 +08:00
early_me.c	x86: ivybridge: Use syscon for the GMA device	2016-01-24 12:09:42 +08:00
fsp_configs.c	x86: ivybridge: Add FSP support	2016-02-21 13:42:52 +08:00
gma.c	x86: Create a common header for Intel register access	2016-03-17 10:27:24 +08:00
gma.h	x86: Add initial video device init for Intel GMA	2014-11-25 07:11:16 -07:00
ivybridge.c	x86: ivybridge: Add FSP support	2016-02-21 13:42:52 +08:00
Kconfig	x86: Add Intel Cougar Canyon 2 board	2016-02-21 13:42:52 +08:00
lpc.c	x86: ivybridge: Drop the SMM-locking code	2016-01-24 12:09:42 +08:00
Makefile	x86: Move microcode code to a common location	2016-03-17 10:27:24 +08:00
me_status.c	x86: ivybridge: Implement SDRAM init	2014-11-21 07:34:15 +01:00
model_206ax.c	x86: Add some more common MSR indexes	2016-03-17 10:27:23 +08:00
northbridge.c	x86: Create a common header for Intel register access	2016-03-17 10:27:24 +08:00
report_platform.c	x86: ivybridge: Convert report_platform to DM PCI API	2016-01-24 12:09:41 +08:00
sata.c	dm: Use uclass_first_device_err() where it is useful	2016-03-14 15:34:50 -06:00
sdram.c	x86: Create a common header for Intel register access	2016-03-17 10:27:24 +08:00