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x86: ivybridge: bd82x6x: Support FSP enabled configuration

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Wrap initialization codes with #ifndef CONFIG_HAVE_FSP #endif,
and enable the build for both FSP and non-FSP configurations.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2016-02-17 00:16:24 -08:00
parent dc5be508b0
commit 87077e97d1
2 changed files with 5 additions and 1 deletions
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2
arch/x86/cpu/ivybridge/Makefile
View file

@ -7,7 +7,6 @@
ifdef CONFIG_HAVE_FSP
obj-y += fsp_configs.o ivybridge.o
else
obj-y += bd82x6x.o
obj-y += car.o
obj-y += cpu.o
obj-y += early_me.o
@ -21,3 +20,4 @@ obj-y += report_platform.o
obj-y += sata.o
obj-y += sdram.o
endif
obj-y += bd82x6x.o

4
arch/x86/cpu/ivybridge/bd82x6x.c
View file

@ -22,6 +22,7 @@
#define GPIO_BASE 0x48
#define BIOS_CTRL 0xdc
#ifndef CONFIG_HAVE_FSP
static int pch_revision_id = -1;
static int pch_type = -1;
@ -170,6 +171,7 @@ static int bd82x6x_probe(struct udevice *dev)
return 0;
}
#endif /* CONFIG_HAVE_FSP */
static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep)
{
@ -247,6 +249,8 @@ U_BOOT_DRIVER(bd82x6x_drv) = {
.name = "bd82x6x",
.id = UCLASS_PCH,
.of_match = bd82x6x_ids,
#ifndef CONFIG_HAVE_FSP
.probe = bd82x6x_probe,
#endif
.ops = &bd82x6x_pch_ops,
};