mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 09:27:35 +00:00
a82abb15a8
Add initial support of STM32MP13 family based on v5.18-rc2 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
123 lines
3.2 KiB
Text
123 lines
3.2 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
|
/*
|
|
* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
|
|
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
*/
|
|
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
|
|
|
|
&pinctrl {
|
|
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
|
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
|
|
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
|
|
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
|
|
<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
|
|
slew-rate = <1>;
|
|
drive-push-pull;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
|
|
pins1 {
|
|
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
|
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
|
|
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
|
|
<STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
|
|
slew-rate = <1>;
|
|
drive-push-pull;
|
|
bias-disable;
|
|
};
|
|
pins2 {
|
|
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
|
|
slew-rate = <1>;
|
|
drive-open-drain;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
|
|
<STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
|
|
<STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
|
|
<STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
|
|
<STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
|
|
<STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
|
|
};
|
|
};
|
|
|
|
sdmmc1_clk_pins_a: sdmmc1-clk-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
|
|
slew-rate = <1>;
|
|
drive-push-pull;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
sdmmc2_b4_pins_a: sdmmc2-b4-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
|
|
<STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
|
|
<STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
|
|
<STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
|
|
<STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
|
|
slew-rate = <1>;
|
|
drive-push-pull;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
|
|
pins1 {
|
|
pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
|
|
<STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
|
|
<STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
|
|
<STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
|
|
slew-rate = <1>;
|
|
drive-push-pull;
|
|
bias-pull-up;
|
|
};
|
|
pins2 {
|
|
pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
|
|
slew-rate = <1>;
|
|
drive-open-drain;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
|
|
<STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
|
|
<STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
|
|
<STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
|
|
<STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
|
|
<STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
|
|
};
|
|
};
|
|
|
|
sdmmc2_clk_pins_a: sdmmc2-clk-0 {
|
|
pins {
|
|
pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
|
|
slew-rate = <1>;
|
|
drive-push-pull;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
uart4_pins_a: uart4-0 {
|
|
pins1 {
|
|
pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
|
|
bias-disable;
|
|
drive-push-pull;
|
|
slew-rate = <0>;
|
|
};
|
|
pins2 {
|
|
pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|