mirror of
https://github.com/AsahiLinux/u-boot
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71d2a5e5ef
Synchronize R-Car device trees with Linux 6.1.7, commit 21e996306a6afaae88295858de0ffb8955173a15 . The following script has been used for the synchronization: $ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ; elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/ else echo "NOT FOUND: $i" fi done $ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' ) Move the include/dt-bindings/{clk,clock}/versaclock.h header used by the renesas boards to match Linux 6.1.y as well. Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used by the arch/arm/dts/r8a774c0-cat874.dts board. Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" . Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect the card enumeration in ebisu.dtsi /aliases DT node . Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to reflect the card enumeration in ulcb.dtsi /aliases DT node . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
330 lines
6.1 KiB
Text
330 lines
6.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the R-Car H3 (R8A77950) SoC
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*
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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#include "r8a77951.dtsi"
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#undef SOC_HAS_USB2_CH3
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&audma0 {
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iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
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<&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
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<&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
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<&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
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<&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
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<&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
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<&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
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<&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
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};
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&audma1 {
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iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
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<&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
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<&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
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<&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
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<&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
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<&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
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<&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
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<&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
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};
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&cluster0_opp {
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/delete-node/ opp-1600000000;
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/delete-node/ opp-1700000000;
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};
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&du {
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renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>;
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};
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&fcpvb1 {
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iommus = <&ipmmu_vp0 7>;
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};
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&fcpf1 {
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iommus = <&ipmmu_vp0 1>;
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};
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&fcpvi1 {
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iommus = <&ipmmu_vp0 9>;
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};
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&fcpvd2 {
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iommus = <&ipmmu_vi0 10>;
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};
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&gpio1 {
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gpio-ranges = <&pfc 0 32 28>;
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};
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&ipmmu_vi0 {
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renesas,ipmmu-main = <&ipmmu_mm 11>;
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};
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&ipmmu_vp0 {
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renesas,ipmmu-main = <&ipmmu_mm 12>;
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};
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&ipmmu_vc0 {
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renesas,ipmmu-main = <&ipmmu_mm 9>;
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};
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&ipmmu_vc1 {
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renesas,ipmmu-main = <&ipmmu_mm 10>;
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};
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&ipmmu_rt {
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renesas,ipmmu-main = <&ipmmu_mm 7>;
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};
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&soc {
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/delete-node/ dma-controller@e6460000;
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/delete-node/ dma-controller@e6470000;
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ipmmu_mp1: iommu@ec680000 {
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compatible = "renesas,ipmmu-r8a7795";
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reg = <0 0xec680000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 5>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#iommu-cells = <1>;
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};
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ipmmu_sy: iommu@e7730000 {
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compatible = "renesas,ipmmu-r8a7795";
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reg = <0 0xe7730000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 8>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#iommu-cells = <1>;
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};
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/delete-node/ iommu@fd950000;
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/delete-node/ iommu@fd960000;
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/delete-node/ iommu@fd970000;
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/delete-node/ iommu@febe0000;
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/delete-node/ iommu@fe980000;
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xhci1: usb@ee040000 {
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compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
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reg = <0 0xee040000 0 0xc00>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 327>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 327>;
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status = "disabled";
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};
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/delete-node/ usb@e659c000;
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/delete-node/ usb@ee0e0000;
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/delete-node/ usb@ee0e0100;
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/delete-node/ usb-phy@ee0e0200;
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fdp1@fe948000 {
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compatible = "renesas,fdp1";
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reg = <0 0xfe948000 0 0x2400>;
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interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 117>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 117>;
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renesas,fcp = <&fcpf2>;
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};
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fcpf2: fcp@fe952000 {
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compatible = "renesas,fcpf";
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reg = <0 0xfe952000 0 0x200>;
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clocks = <&cpg CPG_MOD 613>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 613>;
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iommus = <&ipmmu_vp0 2>;
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};
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fcpvd3: fcp@fea3f000 {
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compatible = "renesas,fcpv";
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reg = <0 0xfea3f000 0 0x200>;
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clocks = <&cpg CPG_MOD 600>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 600>;
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iommus = <&ipmmu_vi0 11>;
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};
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fcpvi2: fcp@fe9cf000 {
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compatible = "renesas,fcpv";
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reg = <0 0xfe9cf000 0 0x200>;
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clocks = <&cpg CPG_MOD 609>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 609>;
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iommus = <&ipmmu_vp0 10>;
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};
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vspd3: vsp@fea38000 {
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compatible = "renesas,vsp2";
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reg = <0 0xfea38000 0 0x5000>;
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interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 620>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 620>;
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renesas,fcp = <&fcpvd3>;
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};
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vspi2: vsp@fe9c0000 {
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compatible = "renesas,vsp2";
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reg = <0 0xfe9c0000 0 0x8000>;
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interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 629>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 629>;
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renesas,fcp = <&fcpvi2>;
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};
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csi21: csi2@fea90000 {
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compatible = "renesas,r8a7795-csi2";
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reg = <0 0xfea90000 0 0x10000>;
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interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 713>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 713>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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};
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port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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csi21vin0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vin0csi21>;
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};
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csi21vin1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vin1csi21>;
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};
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csi21vin2: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&vin2csi21>;
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};
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csi21vin3: endpoint@3 {
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reg = <3>;
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remote-endpoint = <&vin3csi21>;
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};
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csi21vin4: endpoint@4 {
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reg = <4>;
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remote-endpoint = <&vin4csi21>;
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};
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csi21vin5: endpoint@5 {
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reg = <5>;
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remote-endpoint = <&vin5csi21>;
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};
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csi21vin6: endpoint@6 {
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reg = <6>;
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remote-endpoint = <&vin6csi21>;
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};
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csi21vin7: endpoint@7 {
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reg = <7>;
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remote-endpoint = <&vin7csi21>;
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};
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};
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};
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};
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};
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&vin0 {
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ports {
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port@1 {
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vin0csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin0>;
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};
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};
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};
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};
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&vin1 {
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ports {
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port@1 {
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vin1csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin1>;
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};
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};
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};
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};
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&vin2 {
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ports {
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port@1 {
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vin2csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin2>;
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};
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};
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};
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};
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&vin3 {
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ports {
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port@1 {
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vin3csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin3>;
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};
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};
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};
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};
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&vin4 {
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ports {
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port@1 {
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vin4csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin4>;
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};
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};
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};
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};
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&vin5 {
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ports {
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port@1 {
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vin5csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin5>;
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};
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};
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};
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};
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&vin6 {
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ports {
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port@1 {
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vin6csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin6>;
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};
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};
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};
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};
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&vin7 {
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ports {
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port@1 {
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vin7csi21: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi21vin7>;
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};
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};
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};
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};
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