mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 07:31:15 +00:00
9ff32d8ccf
After determining how much DDR is actually in the system, set DBAT0 and IBAT0 accordingly. This ensures that the CPU won't attempt to access (via speculation) addresses outside of actual memory. On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB and kept that way. If the system has less than 2GB of memory (typical for an MPC8610 HPCD), the CPU may attempt to access this memory during speculation. The zlib code is notorious for generating such memory reads, and indeed on the MPC8610, uncompressing the Linux kernel causes a machine check (without this patch). Currently we are limited to power of two sized DDR since we only use a single bat. If a non-power of two size is used that is less than CONFIG_MAX_MEM_MAPPED u-boot will crash. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
||
---|---|---|
.. | ||
4xx_pci.h | ||
4xx_pcie.h | ||
5xx_immap.h | ||
8xx_immap.h | ||
atomic.h | ||
bitops.h | ||
byteorder.h | ||
cache.h | ||
config.h | ||
cpm_85xx.h | ||
cpm_8260.h | ||
e300.h | ||
errno.h | ||
fsl_ddr_dimm_params.h | ||
fsl_ddr_sdram.h | ||
fsl_dma.h | ||
fsl_i2c.h | ||
fsl_law.h | ||
fsl_lbc.h | ||
fsl_pci.h | ||
fsl_serdes.h | ||
global_data.h | ||
gpio.h | ||
immap_83xx.h | ||
immap_85xx.h | ||
immap_86xx.h | ||
immap_512x.h | ||
immap_8220.h | ||
immap_8260.h | ||
immap_qe.h | ||
interrupt.h | ||
io.h | ||
iopin_8xx.h | ||
iopin_85xx.h | ||
iopin_8260.h | ||
m8260_pci.h | ||
mc146818rtc.h | ||
mmu.h | ||
mp.h | ||
mpc8xxx_spi.h | ||
mpc512x.h | ||
mpc8349_pci.h | ||
pci_io.h | ||
pnp.h | ||
posix_types.h | ||
ppc4xx-ebc.h | ||
ppc4xx-isram.h | ||
ppc4xx-sdram.h | ||
ppc4xx-uic.h | ||
ppc4xx_config.h | ||
processor.h | ||
ptrace.h | ||
residual.h | ||
sigcontext.h | ||
signal.h | ||
status_led.h | ||
string.h | ||
types.h | ||
u-boot.h | ||
unaligned.h | ||
xilinx_irq.h |