Commit graph

684 commits

Author SHA1 Message Date
Stefan Mavrodiev
7f25d81797 arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is
adapted from mailine kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-08-03 11:14:08 +05:30
Chris Packham
4f4dde0a62 spi: kirkwood: add orion-spi compatible string
This matches the compatible string used by the Linux kernel. This will
allow u-boot to use the same device tree files.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: use armada instead of orion on .data]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-03 11:14:02 +05:30
Jagan Teki
f5ff46f6e5 spi: kirkwood: Get drvdata in .ofdata_to_platdata
Get the is_errata_50mhz_ac in .ofdata_to_platdata, and
reuse it in .set_mode this can eventually initialized
dt code at once and adding room to add platdata.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-03 11:09:53 +05:30
Christophe Kerello
d68b6ad138 spi: stm32_qspi: rework mode management
This patch solves quad read issue with Macronix/Micron spi nor.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-23 14:33:21 -04:00
Christophe Kerello
ceff933e1e spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr
This patch assigns the functional operation mode in _stm32_qspi_gen_ccr
function.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-23 14:33:21 -04:00
Siva Durga Prasad Paladugu
22cca1730e spi: zynqmp_gqspi: Add support for ZynqMP qspi driver
This patch adds qspi driver support for ZynqMP SoC. This
driver is responsible for communicating with qspi flash
devices.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
[jagan: removed GQSPI_MIO_NUM_ macros]
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:47 +05:30
Vipul Kumar
6e9d9fcb4c spi: xilinx_spi: convert to livetree
Update the xilinx spi driver to support a live tree.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Vipul Kumar
83ce646943 spi: xilinx_spi: Added support to read JEDEC-id twice at the boot time
This patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as QSPI provides command. So, first
command fails.

This patch added support to read JEDEC id in xilinx_spi_xfer ().

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Vipul Kumar
0c0de58f7b spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function
This patch modify xilinx_spi_xfer() function and add rxfifo() and
txfifo() functions to add the modularity so that these functions
can be used by other functions within the same file.

This patch also added support to read fifo_size from dts.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Michal Simek
4e7c1a2651 spi: xilinx: Read reg base address from DTS file
This patch added support to read register base address from DTS file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:20 +05:30
Ley Foon Tan
8b71e46cea spi: cadence_qspi: Fix warning cast from pointer to integer of different size
Use "%p" to print cmdbuf.

Compilation warning as below:

  CC      spl/drivers/spi/cadence_qspi_apb.o
  LD      spl/lib/built-in.o
drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’:
drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
          cmdlen, (unsigned int)cmdbuf);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Ley Foon Tan
9bd39dd8e5 spi: cadence_qspi: Fix compilation warning
Use "%zu" for size_t data type.

Compilation warning as below:

In file included from include/linux/bug.h:7:0,
                 from include/common.h:26,
                 from drivers/spi/cadence_qspi.c:8:
drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’:
drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);
        ^
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
 #define pr_fmt(fmt) fmt
                     ^~~
include/log.h:142:2: note: in expansion of macro ‘debug_cond’
  debug_cond(_DEBUG, fmt, ##args)
  ^~~~~~~~~~
drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-07-12 09:22:11 +02:00
Thomas Fitzsimmons
894c3ad27f board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-07-10 16:55:57 -04:00
Hannes Schmelzer
c0eaffa039 spi: omap3: fix claim/release bus within DM
The claim/release bus function must not reset the whole SPI core because
settings regarding wordlen, clock-frequency and so on made by
set_wordlen, set_mode, set_speed get lost with this action. Resulting in
a non-functional SPI.

Without DM the failure didn't came up since after the spi_reset within
claim bus all the setup (wordlen, mode, ...) was called, in DM they are
called by the spi uclass.

We change now the things as following for having a working SPI instance
in DM:

- move the spi_reset(...) to the probe call in DM for having a known
hardware state after probe. Without DM we don't have a probe call, so we
issue the reset as before during the claim_bus call.

- in release bus we just reset the modulctrl to the reset-value (spi-
slave)

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-28 19:54:10 +05:30
Hannes Schmelzer
9cddf70ead spi: omap3: fix set_speed and set_mode dm callbacks
commit 8480792287
("spi: omap3: Skip set_mode, set_speed from claim") did break SPI
support on my AM335x board.

The named commit:

- ignored the responsible arguments (speed, mode)
The set speed/mode function must use the supplied function arguments to
work properly. With this commit we take those arguments and transfer
them to the priv-data.

- used wrong udevice pointer for getting priv data
the udevice-pointer within function argument is already the spi-bus
device, so it is wrong looking here for some parent (ocp-bus in this
case) and getting priv-pointer from there.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:35:15 +05:30
Hannes Schmelzer
b1d2b529b4 spi: omap3: pre-initialize bus-speed with max. slave-speed
Otherwise the frequency is zero and the clock divider cannot be setup by
'omap3_spi_set_speed' function.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:35:01 +05:30
Michael Trimarchi
34ad749141 spi: mxc_spi: Fix chipselect on DM_SPI driver uclass
CS GPIO activation low/high is determinated by the device tree
so we don't need to take in accoung in cs_activate and cs_deactivate

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:23:06 +05:30
Michael Trimarchi
618e8e20c2 spi: mxc: Fix compilation problem of DM_SPI class driver
drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr'
linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 14:18:41 +05:30
Vipul Kumar
240cd7566e spi: zynq_qspi: Fixed incorrect return value error
This patch replaced "return 0" with "return status" to fix the
incorrect return value error reported by the coverity.

Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-25 14:13:57 +05:30
Ley Foon Tan
6c353674bd spi: cadence_qspi: Change to use devfdt_get_addr_index()
Change to use devfdt_get_addr_index() function to get fdt address.

Original code has compilation warning below:

drivers/spi/cadence_qspi.c: In function ‘cadence_spi_ofdata_to_platdata’:
drivers/spi/cadence_qspi.c:297:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->regbase = (void *)data[0];
                  ^
drivers/spi/cadence_qspi.c:298:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->ahbbase = (void *)data[2];
                  ^
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:30:04 +05:30
Tom Rini
2a046ff5e9 Merge branch 'master' of git://git.denx.de/u-boot-mips 2018-06-01 16:46:39 -04:00
Álvaro Fernández Rojas
46689a94b2 spi: bcm63xx_hsspi: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Álvaro Fernández Rojas
85e1ddbaf0 spi: bcm63xx_spi: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-06-01 15:56:02 +02:00
Tom Rini
8ada17dde8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv
  tree fixing a warning.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-30 14:51:37 -04:00
Rick Chen
6083cf3883 spi: atcspi200: Fix compiler warning
Fix warning as below when compile in 64-bit.

warning: format '%u' expects argument of type
'unsigned int', but argument 6 has type 'size_t
{aka long unsigned int}

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Heinrich Schuchardt
4bcd88a2d8 spi: fsl_qspi: remove superfluous assignment
In

	void *rx_addr = NULL;
	rx_add = A;

the first assignment has no effect. Remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:19:24 +05:30
Heinrich Schuchardt
266580612f spi: lpc32xx: simplify logical expression
A & A & B == A & B

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:19:06 +05:30
Heinrich Schuchardt
8fad5e0b11 spi: atcspi200: avoid NULL dereference
For SPI_XFER_BEGIN | SPI_XFER_END the code sets data_out = NULL.
In the debug statement we should not dereference this value.
As we do not transfer any data the debug statement is not needed in this
case anyway.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 19:18:41 +05:30
Patrice Chotard
5e46123bf3 spi: stm32_qspi: Add reset support
In some situation, QSPI controller is already configured by an early
boot stage, adding reset support will insure that QSPI controller is
started from a pristine state.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
2a6ca73691 spi: stm32_qspi: Use dev_read_xxx API
Use dev_read_xxx() instead of old manner fdt_xxx() API

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
495f3b2ae5 spi: stm32_qspi: Add chip select management
Quad-SPI interface is able to manage 2 spi nor devices.
FSEL bit selects the flash memory to be addressed in single flash mode.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
76afe56a44 spi: stm32_qspi: Add st, stm32f469-qspi compatible string
Add "st,stm32f469-qspi" compatible which is used on kernel side.
This will be necessary when DT will be synchronised from kernel.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Christophe Kerello
09e1772067 spi: stm32_qspi: Align reg-names with kernel 4.12 RC1
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.12-rc1.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
8c4592d278 spi: stm32_qspi: Sort include files alphabetically
Sort include files by alphabetical order

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrick Delaunay
936abadac8 spi: stm32_qspi: Solve issue detected by checkpatch
Fix parameters function alingemnt
Fix variable declaration

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Patrice Chotard
12e7c91a0b spi: stm32_qspi: Remove CONFIG_CLK flag
As all platforms which uses this driver have CONFIG_CLK flag
enable in their defconfig, we can remove it from driver code.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:41:21 +05:30
Marek Behún
dbbd5bdd27 spi: mvebu_a3700_spi: Use Armada 37xx clk driver for SPI clock frequency
Since now we have driver for clocks on Armada 37xx, use it to determine
SQF clock frequency for the SPI driver.

Also change the default config files for Armada 37xx devices so that
the clock driver is enabled by default, otherwise the SPI driver cannot
be enabled.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Rajat Srivastava
1f55356411 spi: fsl_qspi: Introduce is_controller_busy function
Some SoCs have different endianness of QSPI IP if compared
to endianness of core. The function is_controller_busy()
checks if the QSPI controller is busy or not, considering
the endianness of the QSPI IP.

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Adam Ford
f1b1f77060 Convert CONFIG_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver.  For now, just update
the CONFIG tests.  This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:11 -04:00
Eugeniy Paltsev
9b14ac5cc2 spi: dw: invert wait condition in dw_spi_xfer
While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.

Fix that by inverting exit condition for readl_poll_timeout.

Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23 11:16:41 +05:30
Marek Vasut
ea5512eb09 spi: sh_qspi: Make use of the 32byte FIFO
The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing
the SPI transmission 1 byte at time, if there is a 32byte chunk of
data to be transferred, fill the FIFO completely and then transfer
the data to/from the FIFO. This increases the SPI NOR access speed
significantly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
9573db654d spi: sh_qspi: Replace ad hoc waiting with wait_for_bit
Replace the ad-hoc endless loops with wait_for_bit() with
reasonable timeout. Note that the loops had internal 10uS
delays, although there is no reason for those on this HW,
so they are dropped.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
1182264952 spi: sh_qspi: Drop SPBDCR wait
Waiting for SPBDCR == 1 is not required and is covered by the
subsequent wait for SPSR_SPRFF, so drop this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:51 +02:00
Marek Vasut
0e6fa20b14 spi: sh_qspi: Replace data types with short ones
Just replace unsigned {char,short,long} with u{8,16,32},
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2018-04-11 23:19:50 +02:00
Marek Vasut
fbebea27e1 mtd: spi: Add Renesas RPC SPI-flash driver
Add driver for the RPC block in SPI-flash mode. This driver allows
access to a SPI NOR flash attached to the RPC block and does not
support RPC in Hyperflash mode. Note that this block is extremely
selective when communicating with the SPI NOR.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:12:01 +02:00
Tom Rini
e80fa2c2c0 Revert "spi: atmel: Drop non-dm code"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 7b09477873.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:19:00 -04:00
Tom Rini
5270df2836 Revert "spi: atmel: Drop atmel_spi.h"
As we aren't quite able to convert some platforms with a very small size
limit in SPL yet, we need to revert this for now.

This reverts commit 37434db29b.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 09:18:26 -04:00
Christophe Leroy
18f8d4c60d powercp: mpc8xx: move commproc.h
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and
move it into arch/powerpc/include/asm

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-04-06 16:30:37 -04:00